AMD SC1201 F3BAR0 Audio Support Registers Summary, F5BAR0 I/O Control Support Registers Summary

List of Tables	32579B
Table 6-22.	F3: PCI Header Registers for Audio Support Summary	183
Table 6-23.	F3BAR0: Audio Support Registers Summary	184
Table 6-24.	F5: PCI Header Registers for X-Bus Expansion Support Summary	185
Table 6-25.	F5BAR0: I/O Control Support Registers Summary	185
Table 6-26.	PCIUSB: USB PCI Configuration Register Summary	186
Table 6-27.	USB_BAR: USB Controller Registers Summary	187
Table 6-28.	ISA Legacy I/O Register Summary	188
Table 6-29.	F0: PCI Header/Bridge Configuration Registers for GPIO and LPC Support	190
Table 6-30.	F0BAR0+I/O Offset: GPIO Configuration Registers	224
Table 6-31.	F0BAR1+I/O Offset: LPC Interface Configuration Registers	228
Table 6-32.	F1: PCI Header Registers for SMI Status and ACPI Support	236
Table 6-33.	F1BAR0+I/O Offset: SMI Status Registers	237
Table 6-34.	F1BAR1+I/O Offset: ACPI Support Registers	247
Table 6-35.	F2: PCI Header/Channels 0 and 1 Registers for IDE Controller Configuration	256
Table 6-36.	F2BAR4+I/O Offset: IDE Controller Configuration Registers	260
Table 6-37.	F3: PCI Header Registers for Audio Configuration	262
Table 6-38.	F3BAR0+Memory Offset: Audio Configuration Registers	263
Table 6-39.	F5: PCI Header Registers for X-Bus Expansion	277
Table 6-40.	F5BAR0+I/O Offset: X-Bus Expansion Registers	281
Table 6-41.	PCIUSB: USB PCI Configuration Registers	283
Table 6-42.	USB_BAR+Memory Offset: USB Controller Registers	285
Table 6-43.	DMA Channel Control Registers	296
Table 6-44.	DMA Page Registers	301
Table 6-45.	Programmable Interval Timer Registers	302
Table 6-46.	Programmable Interrupt Controller Registers	304
Table 6-47.	Keyboard Controller Registers	307
Table 6-48.	Real-Time Clock Registers	308
Table 6-49.	Miscellaneous Registers	308
Table 7-1.	Direct Mode and Capture Mode Configurations	316
Table 7-2.	Valid Mixing/Blending Configurations	324
Table 7-3.	Truth Table for Alpha Blending	327
Table 7-4.	Flicker Filter Operation	329
Table 7-5.	F4: PCI Header Registers for Video Processor Support Summary	333
Table 7-6.	F4BAR0: Video Processor Configuration Registers Summary	333
Table 7-7.	F4BAR2: VIP Support Registers Summary	335
Table 7-8.	F4: PCI Header Registers for Video Processor Support Registers	336
Table 7-9.	F4BAR0+Memory Offset: Video Processor Configuration Registers	338
Table 7-10.	F4BAR2+Memory Offset: VIP Configuration Registers	359
Table 8-1.	JTAG Mode Instruction Support	363
Table 9-1.	Electro Static Discharge (ESD)	365
Table 9-2.	Absolute Maximum Ratings	365
Table 9-3.	Operating Conditions	366
Table 9-4.	Power Planes of External Interface Signals	367
Table 9-5.	System Conditions Used to Measure SC1200/SC1201 Current During On State	368
Table 9-6.	DC Characteristics for On State	368
Table 9-7.	DC Characteristics for Active Idle, Sleep, and Off States	369
Table 9-8.	Ball Capacitance and Inductance	369
Table 9-9.	Balls with PU/PD Resistors	370
Table 9-10.	Buffer Types	371
Table 9-11.	Default Levels for Measurement of Switching Parameters	376
Table 9-12.	Memory Controller Timing Parameters	378
Table 9-13.	Video Input Port Timing Parameters	380
Table 9-14.	Video Output Port Timing Parameters	381
Table 9-15.	TFT Timing Parameters	382
Table 9-16.	CRT VESA Compatible DAC (RED, GREEN, and BLUE Outputs)	383
AMD Geode™ SC1200/SC1201 Processor Data Book		11