AMD SC1200, SC1201 manual Polarity selection, 230

32579BCore Logic Module - Bridge, GPIO, and LPC Registers - Function 0

Table 6-31. F0BAR1+I/O Offset: LPC Interface Configuration Registers (Continued)

Bit	Description
14	IRQ14 Polarity. If LPC is selected as the interface source for IRQ14 (F0BAR1+I/O Offset 00h[14] = 1), this bit allows signal
	polarity selection.
	0:	Active high.
	1:	Active low.
13	IRQ13 Polarity. If LPC is selected as the interface source for IRQ13 (F0BAR1+I/O Offset 00h[13] = 1), this bit allows signal
	polarity selection.
	0:	Active high.
	1:	Active low.
12	IRQ12 Polarity. If LPC is selected as the interface source for IRQ12 (F0BAR1+I/O Offset 00h[12] = 1), this bit allows signal
	polarity selection.
	0:	Active high.
	1:	Active low.
11	IRQ11 Polarity. If LPC is selected as the interface source for IRQ11 (F0BAR1+I/O Offset 00h[11] = 1), this bit allows signal
	polarity selection.
	0:	Active high.
	1:	Active low.
10	IRQ10 Polarity. If LPC is selected as the interface source for IRQ10 (F0BAR1+I/O Offset 00h[10] = 1), this bit allows signal
	polarity selection.
	0:	Active high.
	1:	Active low.
9	IRQ9 Polarity. If LPC is selected as the interface source for IRQ9 (F0BAR1+I/O Offset 00h[9] = 1), this bit allows signal
	polarity selection.
	0:	Active high.
	1:	Active low.
8	IRQ8# Polarity. If LPC is selected as the interface source for IRQ8# (F0BAR1+I/O Offset 00h[8] = 1), this bit allows signal
	polarity selection.
	0:	Active high.
	1:	Active low.
7	IRQ7 Polarity. If LPC is selected as the interface source for IRQ7 (F0BAR1+I/O Offset 00h[7] = 1), this bit allows signal
	polarity selection.
	0:	Active high.
	1:	Active low.
6	IRQ6 Polarity. If LPC is selected as the interface source for IRQ6 (F0BAR1+I/O Offset 00h[6] = 1), this bit allows signal
	polarity selection.
	0:	Active high.
	1:	Active low.
5	IRQ5 Polarity. If LPC is selected as the interface source for IRQ5 (F0BAR1+I/O Offset 00h[5] = 1), this bit allows signal
	polarity selection.
	0:	Active high.
	1:	Active low.
4	IRQ4 Polarity. If LPC is selected as the interface source for IRQ4 (F0BAR1+I/O Offset 00h[4] = 1), this bit allows signal
	polarity selection.
	0:	Active high.
	1:	Active low.
3	IRQ3 Polarity. If LPC is selected as the interface source for IRQ3 (F0BAR1+I/O Offset 00h[3] = 1), this bit allows signal
	polarity selection.
	0:	Active high.
	1:	Active low.

230 AMD Geode™ SC1200/SC1201 Processor Data Book