Core Logic Module - USB Controller Registers - PCIUSB

32579B

Table 6-42. USB_BAR+Memory Offset: USB Controller Registers (Continued)

Bit

Description

3Read: PortOverCurrentIndicator. This bit reflects the state of the OVRCUR pin dedicated to this port. This field is only valid if NoOverCurrentProtection is cleared and OverCurrentProtectionMode is set.

0:No over-current condition.

1:Over-current condition.

Write: ClearPortSuspend. Writing a 1 initiates the selective resume sequence for the port. Writing a 0 has no effect.

2Read: PortSuspendStatus.

0:Port is not suspended.

1:Port is selectively suspended.

Write: SetPortSuspend. Writing a 1 sets PortSuspendStatus. Writing a 0 has no effect.

1Read: PortEnableStatus.

0:Port disabled.

1:Port enabled.

Write: SetPortEnable. Writing a 1 sets PortEnableStatus. Writing a 0 has no effect.

0Read: CurrentConnectStatus.

0:No device connected.

1:Device connected.

If DeviceRemoveable is set (not removable) this bit is always 1.

Write: ClearPortEnable. Writing 1 a clears PortEnableStatus. Writing a 0 has no effect.

Note: This register is reset by the UsbReset state.

Offset 5Ch-5Fh

HcRhPortStatus[3] Register (R/W)

Reset Value = 00000000h

 

 

 

 

31:21

Reserved. Read/Write 0s.

 

 

20PortResetStatusChange. This bit indicates that the port reset signal has completed.

0:Port reset is not complete.

1:Port reset is complete.

19PortOverCurrentIndicatorChange. This bit is set when OverCurrentIndicator changes. Writing a 1 clears this bit. Writing a 0 has no effect.

18PortSuspendStatusChange. This bit indicates the completion of the selective resume sequence for the port.

0:Port is not resumed.

1:Port resume is complete.

17PortEnableStatusChange. This bit indicates that the port has been disabled due to a hardware event (cleared PortEna- bleStatus).

0:Port has not been disabled.

1:PortEnableStatus has been cleared.

16ConnectStatusChange. This bit indicates a connect or disconnect event has been detected. Writing a 1 clears this bit. Writing a 0 has no effect.

0:No connect/disconnect event.

1:Hardware detection of connect/disconnect event.

 

If DeviceRemoveable is set, this bit resets to 1.

15:10

Reserved. Read/Write 0s.

9Read: LowSpeedDeviceAttached. This bit defines the speed (and bud idle) of the attached device. It is only valid when CurrentConnectStatus is set.

0:Full speed device.

1:Low speed device.

Write: ClearPortPower. Writing a 1 clears PortPowerStatus. Writing a 0 has no effect.

AMD Geode™ SC1200/SC1201 Processor Data Book

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