32579B

Video Processor Module

7.2.2.3Line Buffers

After the data has been optionally horizontally downscaled the video data is stored in a 3-line buffer. Each line is 360 DWORDs, which means a line width of up to 720 pixels can be stored. This buffer supports two functions. First, the clock domain of the video data changes from the GX1 module’s video clock to the GX1 module’s graphics clock. This clock domain change is required because the video data and graphics data can only be mixed/blended in the same clock domain. The second function the line buffer performs is to provide the necessary look ahead and look behind data in the vertical direction for the vertical upscaler. There is no direct program control of the line buffer.

7.2.2.4Formatter

Video data in YUV 4:2:2 or YUV 4:2:0 format is converted to YUV 4:4:4 format. RGB data is not translated. There is no direct program control of the Formatter.

 

Ai,j

 

 

 

Ai,j+1

 

 

 

 

 

 

 

 

 

 

y

 

 

 

x

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

b1

 

 

z

b2

 

 

 

 

 

 

 

 

Ai+1,jAi+1,j+1

7.2.2.52-Tap Vertical and Horizontal Upscalers

After the video data has been buffered, the upscaling algo- rithm can be applied. The Video Processor employs a Digi- tal Differential Analyzer-style (DDA) algorithm for both horizontal and vertical upscaling. The scaling parameters are programmed via the Video Upscale register (F4BAR0+Memory Offset 10h). The scalers support up to 8x factors for both horizontal and vertical scaling. The scaled video pixel stream is then passed through bi-linear interpolating filters (2-tap, 8-phase) to smooth the output video, significantly enhancing the quality of the displayed image.

The X and Y Upscaler uses the DDA and linear interpolat- ing filter to calculate (via interpolation) the values of the pix- els to be generated. The interpolation formula uses Ai,j,

Ai,j+1, Ai+1,j, and Ai+1,j+1 values to calculate the value of intermediate points. The actual location of calculated

points is determined by the DDA algorithm.

The location of each intermediate point is one of eight phases between the original pixels (see Figure 7-9).

Notes:

 

 

 

 

 

x and y are 0 - 7

 

 

b

 

=

(A

 

8 y

 

y

1

i, j

)----------- + (A

i + 1, j

)--

 

 

 

8

8

b

 

= (A

 

8 y

(A

 

y

2

i, j + 1

)----------- +

i + 1, j + 1

) --

 

 

 

 

8

 

 

 

8

z =

(b

 

 

8 x

 

 

x

 

 

 

1

) ----------- + (b

2

)--

 

 

 

 

 

 

 

8

 

8

 

 

 

Figure 7-9. Linear Interpolation Calculation

322

AMD Geode™ SC1200/SC1201 Processor Data Book

Page 322
Image 322
AMD SC1200, SC1201 Line Buffers, Formatter, 2.5 2-Tap Vertical and Horizontal Upscalers, Ai,j Ai,j+1 Ai+1,jAi+1,j+1, 322