AMD SC1201, SC1200 manual Horizontal Downscaler with 4-Tap Filtering, Maintaining Aspect Ratio

Video Processor Module 32579B

7.2.2.2Horizontal Downscaler with 4-Tap Filtering

The Video Processor implements up to 8:1 horizontal downscaling with 4-tap filtering for horizontal interpolation. Filtering is performed on video data input to the Video Pro- cessor. This data is fed to the filter and then to the down- scaler. There is a bypass path for both filtering and downscaling logic. If this bypass is enabled, video data is written directly into the line buffers. (See Figure 7-8.)

Filtering

There are four 4-bit coefficients which can have pro- grammed values of 0 to 15. The filter coefficients can be programmed via the Video Downscaler Coefficient register (F4BAR0+Memory Offset 40h) to increase picture quality.

Horizontal Downscaler

The Video Processor supports horizontal downscaling. The downscaler can be implemented in the Video Processor to shrink the video window by a factor of up to 8:1, in 1-pixel increments. The downscaler factor (m) is programmed in the Video Downscaler Control register (F4BAR0+Memory Offset 3Ch[4:1]). If bit 0 of this register is set to 0, the down- scaler logic is bypassed.

The horizontal downscaler supports downscaling of video data input format YUV 4:2:2 only.

The downscaler supports up to 29 downscaler factors. There are two types of factors:

•Type A is (1/m+1). One pixel is retained, and m pixels are dropped. This enables downscaling factors of 1/16, 1/15, 1/14, 1/13, 1/12, 1/11, 1/10, 1/9,1/8, 1/7, 1/6, 1/5, 1/4, 1/3, and 1/2.

•Type B is (m/m+1). m pixels are retained, and one pixel is dropped. This enables downscaling factors of 2/3, 3/4, 4/5, 5/6, 6/7, 7/8, 8/9, 9/10, 10/11, 11/12, 12/13, 13/14, 14/15, and 15/16.

Bit 6 of the Video Downscaler Control register (F4BAR0+Memory Offset 3Ch) selects the type of down- scaling factor to be used.

Note: There is no vertical downscaling in the Video Pro- cessor.

Maintaining Aspect Ratio

The main purpose of the horizontal downscaler is to main- tain the aspect ratio of graphics data displayed on a TV, which was originally generated for CRT display.

NTSC has an aspect ratio that is slightly different than a CRT. When graphics is generated for a CRT and is dis- played on a TV, the resulting TV image is narrowed. To cor- rect the aspect ratio, graphics data should be generated in 640x480 resolution. The full screen video is in 720x480 resolution. The 4-tap horizontal downscaler must be enabled to bring the video data down to the same resolu- tion as the graphics data to allow for proper mixing/blend- ing. In the TVOUT block (see Section 7.2.4 on page 329) there is a horizontal upscaler/downscaler which is used to bring the mixed/blended data back up to the required 720x480 resolution for TV. This process stretches the graphics data horizontally and corrects the aspect ratio.

PAL also has an aspect ratio different than a CRT. But instead of the graphics being narrowed, it is stretched. To correct this aspect ratio error the graphics data should be generated in 768x576 resolution. The full screen video res- olution is 720x576 and it must be scaled up using the hori- zontal upscaler (see Section 7.2.2.5) to 768x576. In the TVOUT block the horizontal upscaler/downscaler is used to downscale the mixed/blended data to the required 720x576 resolution. This process narrows the graphics data horizon- tally and corrects the aspect ratio.

For both NTSC and PAL, using the two scalers reduces the quality of the video. Graphics data aspect ratio correction should only be done when the graphics data (such as inter- net content) is generated expecting a CRT display’s aspect ratio. When graphics data is the only content viewed, this 4- tap horizontal downscaler is not used but the TVOUT block’s horizontal upscaler should still be used for graphics data aspect ratio correction.

Bypass

		To Line
		Buffers
Video	4-Tap	Horizontal
Input
	Filtering	Downscaler

4x4

Coefficients

Downscale

Factors

Figure 7-8. Horizontal Downscaler Block Diagram

AMD Geode™ SC1200/SC1201 Processor Data Book 321