AMD SC1200, SC1201 Audio Registers Function, 37. F3 PCI Header Registers for Audio Configuration

32579B Core Logic Module - Audio Registers - Function 3

6.4.4Audio Registers - Function 3

The register designated as Function 3 (F3) is used to con- figure the PCI portion of support hardware for the audio registers. The bit formats for the PCI Header registers are given in Table 6-37.

A Base Address register (F3BAR0), located in the PCI Header registers of F3, is used for pointing to the register space designated for support of audio, described later in this section.

Table 6-37. F3: PCI Header Registers for Audio Configuration

Bit	Description
Index 00h-01h		Vendor Identification Register (RO)	Reset Value: 100Bh
Index 02h-03h		Device Identification Register (RO)	Reset Value: 0503h
Index 04h-05h		PCI Command Register (R/W)	Reset Value: 0000h
15:3	Reserved. (Read Only)
2	Bus Master. Allow the Core Logic module bus mastering capabilities.
	0:	Disable.
	1:	Enable. (Default)
	This bit must be set to 1.
1	Memory Space. Allow the Core Logic module to respond to memory cycles from the PCI bus.
	0:	Disable.
	1:	Enable.
	This bit must be enabled to access memory offsets through F3BAR0 (See F3 Index 10h).
0	Reserved. (Read Only)
Index 06h-07h		PCI Status Register (RO)	Reset Value: 0280h
Index 08h		Device Revision ID Register (RO)	Reset Value: 00h
Index 09h-0Bh		PCI Class Code Register (RO)	Reset Value: 040100h
Index 0Ch		PCI Cache Line Size Register (RO)	Reset Value: 00h
Index 0Dh		PCI Latency Timer Register (RO)	Reset Value: 00h
Index 0Eh		PCI Header Type (RO)	Reset Value: 00h
Index 0Fh		PCI BIST Register (RO)	Reset Value: 00h
Index 10h-13h		Base Address Register - F3BAR0 (R/W)	Reset Value: 00000000h

This register sets the base address of the memory mapped audio interface control register block. This is a 128-byte block of registers used to control the audio FIFO and codec interface, as well as to support VSA SMIs. Bits [11:0] are read only (0000 0000 0000), indicat- ing a 4 KB memory address range. Refer to Table 6-38 on page 263 for the audio configuration register bit formats and reset values.

31:12	Audio Interface Base Address.
11:0	Address Range. (Read Only)
Index 14h-2Bh		Reserved	Reset Value: 00h
Index 2Ch-2Dh		Subsystem Vendor ID (RO)	Reset Value: 100Bh
Index 2Eh-2Fh		Subsystem ID (RO)	Reset Value: 0503h
Index 30h-FFh		Reserved	Reset Value: 00h

262 AMD Geode™ SC1200/SC1201 Processor Data Book