AMD SC1201, SC1200 manual Uart Functionality SP1 and SP2, Type Name

SuperI/O Module			32579B
5.8.2	UART Functionality (SP1 and SP2)
Both	SP1 and SP2 provide UART functionality. The	Bank 3
generic SP1 and SP2 support serial data communication
		Bank 2
with remote peripheral device or modem using a wired
		Bank 1	Common
interface. The functional blocks can function as a standard
16450, 16550, or as an Extended UART.		Bank 0	Register
5.8.2.1 UART Mode Register Bank Overview			Throughout
		Offset 07h	All Banks
Four register banks, each containing eight registers, con-		Offset 06h
trol UART operation. All registers use the same 8-byte
address space to indicate offsets 00h through 07h. The		Offset 05h
BSR register selects the active bank and is common to all
banks. See Figure 5-18.		Offset 04h
5.8.2.2 SP1 and SP2 Register and Bit Maps for UART		LCR/BSR
	Functionality
		Offset 02h
The tables in this subsection provide register and bit maps
for Banks 0 through 3.		Offset 01h
		Offset 00h	16550 Banks

Figure 5-18. UART Mode Register Bank

Architecture

		Table 5-37. Bank 0 Register Map
Offset	Type	Name
00h	RO	RXD. Receiver Data Port
	W	TXD. Transmitter Data Port
01h	R/W	IER. Interrupt Enable
02h	RO	EIR. Event Identification (Read Cycles)
	R/W	FCR. FIFO Control (Write Cycles)
03h	W	LCR1. Line Control
	R/W	BSR1.Bank Select
04h	R/W	MCR. Modem/Mode Control
05h	R/W	LSR. Link Status
06h	R/W	MSR. Modem Status
07h	R/W	SPR. Scratchpad
	R/W	ASCR. Auxiliary Status and Control

1.When bit 7 of this register is set to 1, bits [6:0] of BSR select the bank, as shown in Table 5-38 on page 132.

AMD Geode™ SC1200/SC1201 Processor Data Book 131