Compaq 21264, EV67 specifications Preface, Audience, Content

Preface

Audience

This manual is for system designers and programmers who use the Alpha 21264/EV67 microprocessor (referred to as the 21264/EV67).

Content

This manual contains the following chapters and appendixes:

Chapter 1, Introduction, introduces the 21264/EV67 and provides an overview of the Alpha architecture.

Chapter 2, Internal Architecture, describes the major hardware functions and the inter- nal chip architecture. It describes performance measurement facilities, coding rules, and design examples.

Chapter 3, Hardware Interface, lists and describes the internal hardware interface sig- nals, and provides mechanical data and packaging information, including signal pin lists.

Chapter 4, Cache and External Interfaces, describes the external bus functions and transactions, lists bus commands, and describes the clock functions.

Chapter 5, Internal Processor Registers, lists and describes the internal processor regis- ter set.

Chapter 6, Privileged Architecture Library Code, describes the privileged architecture library code (PALcode).

Chapter 7, Initialization and Configuration, describes the initialization and configura- tion sequence.

Chapter 8, Error Detection and Error Handling, describes error detection and error han- dling.

Chapter 9, Electrical Data, provides electrical data and describes signal integrity issues.

Chapter 10, Thermal Management, provides information about thermal management.

Chapter 11, Testability and Diagnostics, describes chip and system testability features.

Appendix A, Alpha Instruction Set, summarizes the Alpha instruction set.

Appendix B, 21264/EV67 Boundary-Scan Register, presents the BSDL description of the 21264/EV67 boundary-scan register.

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