Compaq EV67 MAF Memory Address Space Merging Rules, Instruction Ordering, MAF Merging Rules

Models: 21264 EV67

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MAF Memory Address Space Merging Rules

Byte/word store instructions and different size store instructions are not allowed to merge.

A stream of ascending non-overlapping, but not necessarily consecutive, longword store instructions are allowed to merge into naturally aligned 32-byte blocks.

A stream of ascending non-overlapping, but not necessarily consecutive, quadword store instructions are allowed to merge into naturally aligned 64-byte blocks.

Merging of quadwords can be limited to naturally-aligned 32-byte blocks based on the Cbox WRITE_ONCE chain 32_BYTE_IO field.

Issued MB, WMB, and I/O load instructions close the I/O register merge window. To minimize latency, the merge window is also closed when a timer detects no I/O store instruction activity for 1024 cycles.

After the IOWB merge register has closed its merge window, the Cbox sends I/O space store requests offchip in the order that they were received from the Mbox.

2.9 MAF Memory Address Space Merging Rules

Because all memory transactions are to 64-byte blocks, efficiency is improved by merg- ing several small data transactions into a single larger data transaction. Table 2–9lists the rules the 21264/EV67 uses when merging memory transactions into 64-byte natu- rally aligned data block transactions. Rows represent the merged instruction in the MAF and columns represent the new issued transaction.

Table 2–9 MAF Merging Rules

MAF/New

LDx

STx

STx_C

WH64

ECB

Istream

 

 

 

 

 

 

 

 

LDx

Merge

 

STx

Merge

Merge

 

STx_C

Merge

 

WH64

Merge

 

ECB

Merge

 

Istream

Merge

 

 

 

 

 

 

 

 

 

In summary, Table 2–9shows that only like instruction types, with the exception of load instructions merging with store instructions, are merged.

2.10 Instruction Ordering

In the absence of explicit instruction ordering, such as with MB or WMB instructions, the 21264/EV67 maintains a default instruction ordering relationship between pairs of load and store instructions.

2–30Internal Architecture

Alpha 21264/EV67 Hardware Reference Manual

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Compaq EV67 MAF Memory Address Space Merging Rules, Instruction Ordering, MAF Merging Rules, 30Internal Architecture