Compaq specifications 21264/EV67 Block Diagram, Branch Predictor

21264/EV67 Microarchitecture

Figure 2–1 21264/EV67 Block Diagram
		Instruction Cache
Ibox	Virtual Address	Four	Physical
Fetch Unit
		Instructions	Address
	ITB
VPC	Next Address
Queue		Predecode
Branch	Retire	Decode and	128
Predictor	Unit	Rename Registers

Integer Issue Queue

FP Issue Queue

Cbox

Cache

(20 Entries)

(15 Entries)

Data

Probe

Queue

128

Ebox

Fbox

Cache

Duplicate

Address

INT

INT

Address

FP

FP

Index

Tag Store

ALU 0

UNIT

UNIT

ALU 1

ADD

MUL

20

(L0)

0

1

(L1)

DIV

(U0)

(U1)

SQRT

IOWB

System

Bus

Integer Registers 0

(80 Registers)

Integer Registers 1

(80 Registers)

FP Registers (72 Registers)

Victim Buffer

Arbiter

64

System Address

15

Mbox
	DTB	Load	Store	Miss Address
	(Dual-ported, 128-entry)	Queue	Queue	File

Physical

Data

128

Address

Data

Dual-Ported Data Cache

FM-05642-AI4

2.1.1.2 Branch Predictor

The branch predictor is composed of three units: the local, global, and choice predic- tors. Figure 2–2shows how the branch predictor generates the predicted branch address.

Alpha 21264/EV67 Hardware Reference Manual Internal Architecture 2–3