Compaq EV67, 21264 specifications Physical Address Considerations

Physical Address Considerations

Table 4–1notes:

1.Set Dirty Flow: Based on the Cbox CSR SET_DIRTY_ENABLE[2:0], SetDirty requests can be either internally acknowledged (called a SetModify) or sent to the system environment for processing. When externally acknowledged, the shared sta- tus information for the cache block is also broadcast. The commands sent exter- nally are SharedToDirty or CleanToDirty. Based on the Cbox CSR ENABLE_STC_COMMAND[0], the external system can be informed of a STx_C generating a SetDirty using the STCChangeToDirty command. See Table 4–16for more information.

2.InvalToDirty: Based on the Cbox CSR INVAL_TO_DIRTY_ENABLE[1:0], Inval- ToDirty requests can be either internally acknowledged or sent to the system envi- ronment as InvalToDirty commands. This Cbox CSR provides the ability to convert WH64 instructions to RdModx operations. See Table 4–15for more information.

3.Evict: There are two aspects to the commands that are generated by an ECB

instruction: first, those commands that are generated to notify the system of an evict being performed; second, those commands that are generated by any victim that is created by servicing the ECB.

–If Cbox CSR ENABLE_EVICT[0] is clear, no command is issued by the 21264/EV67 on the external interface to notify the system of an evict being performed. If Cbox CSR ENABLE_EVICT[0] is set, the 21264/EV67 issues an Evict command on the system interface only if a Bcache index match to the ECB address is found in the 21264/EV67 cache system.

Note that whenever ENABLE_EVICT[0] is true (in the write-many chain), BC_CLEAN_VICTIM must also be true (in the write-once chain). Otherwise, the 21264/EV67 could respond miss to a probe, rather than hit, before an Evict command has been sent off chip, but after the Evict command has removed a (clean) block from the internal caches and the Bcache. That behavior might cause systems that maintain an external duplicate copy of the Bcache tags to become confused, because the system could receive the probe response indicat- ing the miss before it receives the Evict command.

–The 21264/EV67 can issue the commands CleanVictimBlk and WrVictimBlk for a victim that is created by an ECB. CleanVictimBlk is issued only if Cbox CSR BC_CLEAN_VICTIM is set and there is a Bcache index match valid but not dirty in the 21264/EV67 cache system. WrVictimBlk is issued for any Bcache match of the ECB address that is dirty in the 21264/EV67 cache sys- tem.

4.MB: Based on the Cbox CSR SYSBUS_MB_ENABLE, the MB command can be sent to the pins.

Each of these CSRs is programmed appropriately, based on the cache coherence proto- col used by the system environment. For example, uniprocessor systems would prefer to internally acknowledge most of these transactions. In contrast, multiprocessor sys- tems may require notification and control of any change in cache state. The 21264/ EV67 and the external system must cooperate to maintain cache coherence. Section 4.5 explains the 21264/EV67 part of the cache coherency protocol.

4–6 Cache and External Interfaces Alpha 21264/EV67 Hardware Reference Manual