Bcache Data Single-Bit Correctable ECC Error

8.8.2 Dcache Fill from Bcache

If the quadword in error is not used to satisfy a load instruction, a hardware recovery flow is not invoked. The quadword in error, and its associated check bits, are written into the Dcache. However, status is logged as shown in the bulleted list below, and a corrected read data (CRD) error interrupt is posted, when enabled. PALcode may elect to correct the error by scrubbing the block. If the error is not corrected by PALcode when it occurs, the error will be detected and corrected by a later load/victim operation.

If the quadword in error is used to satisfy a load instruction, then the flow is very simi- lar to that used for a Dcache ECC error. The LSD ECC checker detects the error and the 21264/EV67 performs the following actions:

The load instruction’s destination register is written with incorrect data; however, the load queue will retain the state associated with the load instruction.

A consumer of the load instruction’s data may be issued before the error is recognized. The Ibox will invoke a replay trap at an instruction that is older than (or equal to) any instruction that consumes the load instruction’s data. The 21264/ EV67 then stalls the replayed Istream in the map stage of the pipeline, until the error is corrected.

With a READ_ERR read type from the Mbox for the load instruction in error, the Cbox scrubs the block in the Dcache by evicting the block into the victim buffer and writing it back into the Dcache.

C_STAT[DSTREAM_BC_ERR] is set.

C_ADDR contains bits [42:6] of the Bcache fill address of the block that contains the error.

C_SYNDROME_0[7:0] and C_SYNDROME_1[7:0] contain the syndrome of quadword 0 and 1, respectively, of the octaword subblock that contains the error.

The load queue retries the load instruction and rewrites the register.

DC_STAT[ECC_ERR_LD] is set.

A corrected read data (CRD) error interrupt is posted, when enabled.

Note: Errors in speculative load instructions cause a CRD error to be posted but the data is not scrubbed by hardware. The PALcode cannot perform a scrub operation because C_STAT is zero and C_ADDR does not contain the address of the block in error.

8.8.3 Bcache Victim Read

A victim from the Bcache is written directly to the system port, without correction. The ECC parity checker on the LSD detects the error and posts a corrected read data (CRD) error interrupt. The Cbox error register is not updated.

8.8.3.1 Bcache Victim Read During a Dcache/Bcache Miss

While the Bcache is servicing a Dcache miss and that Bcache access is also a miss, and an error occurs during that Bcache data access, the Cbox does not latch the error infor- mation. However, the Mbox correction state machine is activated and it invokes a CRD error despite the fact that no correction is performed.

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Error Detection and Error Handling

Alpha 21264/EV67 Hardware Reference Manual

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Compaq EV67, 21264 specifications Bcache Victim Read During a Dcache/Bcache Miss