Freescale Semiconductor MC9S12XDP512 manuals
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Freescale Semiconductor MC9S12XDP512 Manual
986 pages 3.25 Mb
4 Revision History7 Contents23 Chapter 1 Device Overview (MC9S12XDP512V2)101 Chapter 2 512 Kbyte Flash Module (S12XFTX512K4V2)2.1 Introduction2.1.1 Glossary 2.1.2 Features 2.2 External Signal Description 103 FTX512K4 145 Chapter 3 4 Kbyte EEPROM Module (S12XEETX4KV2)177 Chapter 4 Port Integration Module (S12XDP512PIMV2)271 Chapter 5 Clocks and Reset Generator (S12CRGV6)311 Chapter 6 Pierce Oscillator (S12XOSCLCPV1)317 Chapter 7 Analog-to-Digital Converter (ATD10B16CV4)7.1 Introduction7.1.1 Features 7.1.2 Modes of Operation 7.1.3 Block Diagram 319 7.2 External Signal Description7.3 Memory Map and Register Denition 342 7.4 Functional DescriptionThe ATD10B16C is structured in an analog and a digital sub-block. 7.4.1 Analog Sub-block7.4.1.1 Sample and Hold MachineFigure 7-20. Right Justied, ATD Conversion Result Register x, High Byte (ATDDRxH) Figure 7-21. Right Justied, ATD Conversion Result Register x, Low Byte (ATDDRxL) 7.4.1.2 Analog Input Multiplexer 7.4.1.3 Sample Buffer Amplier 7.4.1.4 Analog-to-Digital (A/D) Machine 343 7.4.2 Digital Sub-Block7.4.2.1 External Trigger Input 7.4.2.2 General-Purpose Digital Input Port Operation 344 7.4.3 Operation in Low Power Modes345 7.5 Resets7.6 Interrupts 347 Chapter 8 Analog-to-Digital Converter (ATD10B8CV3)8.1 Introduction8.1.1 Features 8.1.2 Modes of Operation8.1.2.1 Conversion Modes 8.1.2.2 MCU Operating Modes 8.1.3 Block Diagram 348 8.2 External Signal Description8.2.1 ANx (x = 7, 6, 5, 4, 3, 2, 1, 0) Analog Input Pin 8.2.2 ETRIG3, ETRIG2, ETRIG1, and ETRIG0 External Trigger Pins 8.2.3 VRH and VRL High and Low Reference Voltage Pins 8.2.4 V 350 8.3 Memory Map and Register DenitionThis section provides a detailed description of all registers accessible in the ATD.Figure 8-2. ATD Register Summary (Sheet 1 of 5) 8.3.1 Module Memory MapFigure 8-2 gives an overview of all ATD registers. 8.3.2 Register Descriptions 369 8.4 Functional DescriptionThe ATD is structured in an analog and a digital sub-block. 8.4.1 Analog Sub-Block8.4.1.1 Sample and Hold MachineFigure 8-17. Right Justied, ATD Conversion Result Register, High Byte (ATDDRxH) Figure 8-18. Right Justied, ATD Conversion Result Register, Low Byte (ATDDRxL) 8.4.1.2 Analog Input Multiplexer 8.4.1.3 Sample Buffer Amplier 8.4.1.4 Analog-to-Digital (A/D) Machine 370 8.4.2 Digital Sub-Block372 8.5 Resets8.6 Interrupts 373 Chapter 9 XGATE (S12XGATEV2)396 S12X_CPU XGATE9.4.5 Software Error Detection 397 9.5 Interrupts9.5.1 Incoming Interrupt Requests 9.5.2 Outgoing Interrupt Requests 9.6 Debug Mode 399 9.7 Security9.8 Instruction Set 407 ADC Add with Carry ADC408 ADD Add without Carry ADD409 ADDH 410 ADDL 411 AND Logical AND AND412 ANDH 413 ANDL 414 ASR Arithmetic Shift Right ASR415 BCC 416 BCS 417 BEQ Branch if Equal BEQ418 BFEXT Bit Field Extract BFEXT419 BFFO Bit Field Find First One BFFO420 BFINS Bit Field Insert BFINS421 BFINSI Bit Field Insert and Invert BFINSI422 BFINSX Bit Field Insert and XNOR BFINSX423 BGE Branch if Greater than or Equal to Zero BGE424 BGT Branch if Greater than Zero BGT425 BHI Branch if Higher BHI426 BHS 427 BITH 428 BITL 429 BLE Branch if Less or Equal to Zero BLE430 BLO 431 BLS Branch if Lower or Same BLS432 BLT Branch if Lower than Zero BLT433 BMI Branch if Minus BMI434 BNE Branch if Not Equal BNE435 BPL Branch if Plus BPL436 BRA Branch Always BRA437 BRK Break BRK438 BVC Branch if Overflow Cleared BVC439 BVS Branch if Overflow Set BVS440 CMP Compare CMP441 CMPL 442 COM Ones Complement COM443 CPC Compare with Carry CPC444 CPCH 445 CSEM Clear Semaphore CSEM446 CSL Logical Shift Left with Carry CSL447 CSR Logical Shift Right with Carry CSR448 JA L 449 LDB 450 LDH 451 LDL 452 LDW Load Word from Memory LDW453 LSL Logical Shift Left LSL454 LSR Logical Shift Right LSR455 MOV Move Register Content MOV456 NEG Twos Complement NEG457 NOP No Operation NOP458 OR Logical OR OR459 ORH 460 ORL 461 PA R 462 RO L 463 RO R 464 RT S 465 SBC Subtract with Carry SBC466 SSEM Set Semaphore SSEM467 SEX Sign Extend Byte to Word SEX468 SIF Set Interrupt Flag SIF469 STB 470 STW Store Word to Memory STW471 SUB Subtract without Carry SUB472 SUBH 473 SUBL 474 TFR Transfer from and to Special Registers TFR475 TST Test Register TST476 XNOR Logical Exclusive NOR XNOR477 XNORH 478 XNORL
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