C A U T I O N

All About the Logic Analyzer Training Board

The training board helps you learn the basics of HP Logic Analyzers. The following reference information is provided for those who want to know more about how the training board works.

Power Source

The training board is powered by the +5 V supplied by the logic analyzer pods, so a logic analyzer pod must be connected to either J1 or J2 of the training board in order for the training board to work. If only J2 is connected, it must be connected to the logic analyzer through a termination adapter (HP part number 01650-63203).

If the termination adapter part number is HP 01650-63201 , the CLK2 jumper must be set to P.G. to avoid connecting the output of the oscillator to +5 V and eventually damaging the oscillator.

If J1 is connected, the termination adapter is not required because J1 is terminated on the board by Z1 and Z2.

Circuit Description

The training board uses an 8-bit ripple counter running at 32 MHz to produce transitions on the lower 8 bits of a logic analyzer pod. The upper eight bits can be connected to the pattern generator through connector J4.

For state analysis, you can clock the state analyzer via the oscillator on the training board (reference designator Y1) or via a pattern generator in an HP 16500 system. The sources for clocks 1 and 2 are selected by the positions of jumpers CLK1 and CLK2, respectively. When the CLK1 and CLK2 jumpers are set to OSC (oscillator), the clock source for the state analyzer is the oscillator on the training board (Y1). When the CLK1 and CLK2 jumpers are set to P.G. (pattern generator), the clock source for the state analyzer is bit D7 or strobe 2 of the pattern generator, depending on which pattern generator pod is connected to J4.

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