I/O PORTS

Table 6-8. Control Register Values for Each Configuration

Desired Pin Configuration

Configuration Register Settings

 

 

 

 

Standard I/O Signal

Px_DIR

Px_MODE

Px_REG

Complementary output, driving 0

0

0

0

Complementary output, driving 1

0

0

1

Open-drain output, strongly driving 0

1

0

0

Open-drain output, high impedance

1

0

1

Input

1

0

1

Special-function signal

Px_DIR

Px_MODE

Px_REG

Complementary output, output value controlled by peripheral

0

1

X

Open-drain output, output value controlled by peripheral

1

1

X

Input

1

1

1

During reset and until the first write to Px_MODE, the pins are weakly held high.

6.3.3Bidirectional Port Pin Configuration Example

Assume that you wish to configure the pins of a bidirectional port as shown in Table 6-9.

Table 6-9. Port Configuration Example

Port Pin(s)

Configuration

Data

 

 

 

Px.0, Px.1

high-impedance input

high impedance

 

 

 

Px.2, Px.3

open-drain output

0

 

 

 

Px.4

open-drain output

1 (assuming external pull-up)

 

 

 

Px.5, Px.6

complementary output

0

 

 

 

Px.7

complementary output

1

 

 

 

To do so, you could use the following example code segment. Table 6-10 shows the state of each pin after reset and after execution of each line of the example code.

LDB Px_DIR,#00011111B

LDB Px_MODE,#00000000B

LDB Px_REG,#10010011B

6-11

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Intel 8XC196MC, 8XC196MD manual Bidirectional Port Pin Configuration Example, Control Register Values for Each Configuration