INTERFACING WITH EXTERNAL MEMORY

.

 

 

Table 15-4. BUSWIDTH Signal Timing Definitions

 

 

Symbol

Definition

 

 

TAVGV

Address Valid to BUSWIDTH Setup

 

Maximum time the external device has to assert or deassert BUSWIDTH after the microcon-

 

troller outputs the address.

 

 

BUSWIDTH Hold after CLKOUT Low

TCLGX

 

Minimum time the level of the BUSWIDTH signal must be valid after CLKOUT falls.

 

 

††

ALE Low to BUSWIDTH Setup

TLLGV

 

Maximum time the external device has to assert or deassert BUSWIDTH after ALE falls.

 

 

††

BUSWIDTH Hold after ALE Low

TLLGX

 

Minimum time the level of the BUSWIDTH signal must be valid after ALE falls.

 

 

TXTAL1

1/FXTAL1

 

All AC timings are referenced to TXTAL1.

This specification applies to the 8XC196MC, MD microcontrollers only.

††This specification applies to the 8XC196MH microcontroller only.

The BUSWIDTH signal can be used in numerous applications. For example, a system could store code in a 16-bit memory device and data in an 8-bit memory device. The BUSWIDTH signal could be tied to the chip-select input of the 8-bit memory device (shown in Figure 15-13 on page 15-24). When BUSWIDTH is low, it enables 8-bit bus mode and selects the 8-bit memory device. When BUSWIDTH is high, it enables 16-bit bus mode and deselects the 8-bit memory device.

15.3.1 Timing Requirements for BUSWIDTH

When using BUSWIDTH to dynamically change between 8-bit and 16-bit bus widths, setup and hold timings must be met for proper operation (see Figures 15-4 and 15-5, and Table 15-4). Be- cause a decoded, valid address is used to generate the BUSWIDTH signal, the setup time is spec- ified relative to the address being valid. This specification, TAVGV, indicates how much time an external device has to decode the valid address and generate a valid BUSWIDTH signal. As shown in Figure 15-5, the 8XC196MH has an additional BUSWIDTH setup timing specification. This specification, TLLGV, indicates how much time an external device has to generate a valid BUSWIDTH signal after ALE falls.

BUSWIDTH must be held valid until the minimum hold specification, TCLGX (for 8XC196MC,

MD) or TLLGX (for 8XC196MH), has been met. Refer to the datasheet for the current TAVGV, TCLGX, and TLLGX specifications.

15-13

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Intel 8XC196MH, 8XC196MD, 8XC196MC Timing Requirements for Buswidth, Buswidth Signal Timing Definitions, Symbol Definition