Intel 8XC196MH manual Djnz Decrement and Jump if not Zero, Djnzw Decrement and Jump if not Zero

8XC196MC, MD, MH USER’S MANUAL

Table A-6. Instruction Set (Continued)

Mnemonic				Operation						Instruction Format
DIVUB	DIVIDE BYTES, UNSIGNED. This instruction									DEST, SRC
	divides the contents of the destination word								DIVUB	wreg, baop
	operand by the contents of the source byte
									(100111aa) (baop) (wreg)
	operand, using unsigned arithmetic. It stores
	the quotient into the low-order byte (i.e., the
	byte with the lower address) of the
	destination operand and the remainder into
	the high-order byte. The following two
	statements are performed concurrently.
	(low byte DEST) ← (DEST) / (SRC)
	(high byte DEST) ←				(DEST) MOD (SRC)
			PSW Flag Settings
		Z	N	C		V	VT	ST
		—	—	—		✓	−	—

DJNZ	DECREMENT AND JUMP IF NOT ZERO.
	Decrements the value of the byte operand by
	1. If the result is 0, control passes to the next
	sequential instruction. If the result is not 0,
	the instruction adds to the program counter
	the offset between the end of this instruction
	and the target label, effecting the jump. The
	offset must be in the range of –128 to +127.
	(COUNT) ← (COUNT) –1
	if (COUNT) ≠ 0 then
	PC ← PC + 8-bit disp
	end_if

PSW Flag Settings

Z		N		C	V	VT	ST
—	—		—	—	—	—

DJNZ breg, cadd

(11100000) (breg) (disp)

NOTE: The displacement (disp) is sign- extended to 16 bits.

DJNZW	DECREMENT AND JUMP IF NOT ZERO
	WORD. Decrements the value of the word
	operand by 1. If the result is 0, control passes
	to the next sequential instruction. If the result
	is not 0, the instruction adds to the program
	counter the offset between the end of this
	instruction and the target label, effecting the
	jump. The offset must be in the range of –128
	to +127.
	(COUNT) ← (COUNT) –1
	if (COUNT) ≠ 0 then
	PC ← PC + 8-bit disp
	end_if

DJNZW wreg, cadd

(11100001) (wreg) (disp)

NOTE: The displacement (disp) is sign- extended to 16 bits

PSW Flag Settings

Z N C V VT ST

— — — — — —

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