Intel 8XC196MC, 8XC196MD, 8XC196MH manual Long-indexed Addressing, Zero-indexed Addressing

8XC196MC, MD, MH USER’S MANUAL

The instruction LD AX,12H[BX] loads AX with the contents of the memory location that resides at address BX+12H. That is, the instruction adds the constant 12H (the offset) to the contents of BX (the base address), then loads AX with the contents of the resulting address. For example, if BX contains 1000H, then AX is loaded with the contents of location 1012H. Short-indexed ad- dressing is typically used to access elements in a structure, where BX contains the base address of the structure and the constant (12H in this example) is the offset of a specific element in a struc- ture.

You can also use the stack pointer in a short-indexed instruction to access a particular location within the stack, as shown in the following instruction.

LD AX,2[SP]

3.2.4.2Long-indexed Addressing

In a long-indexed instruction, you specify the base address as a 16-bit variable and the offset as an indirect address register (a WORD). The following instructions use long-indexed addressing.

LD	AX,TABLE[BX]	; AX ← MEM_WORD(TABLE + BX)
AND	AX,BX,TABLE[CX]	; AX ← BX		AND MEM_WORD(TABLE + CX)
ST	AX,TABLE[BX]	;	MEM_WORD(TABLE + BX) ← AX
ADDB	AL,BL,LOOKUP[CX]	;	AL ← BL	+ MEM_BYTE(LOOKUP + CX)

The instruction LD AX, TABLE[BX] loads AX with the contents of the memory location that re- sides at address TABLE+BX. That is, the instruction adds the contents of BX (the offset) to the constant TABLE (the base address), then loads AX with the contents of the resulting address. For example, if TABLE equals 4000H and BX contains 12H, then AX is loaded with the contents of location 4012H. Long-indexed addressing is typically used to access elements in a table, where TABLE is a constant that is the base address of the structure and BX is the scaled offset (n × el- ement size, in bytes) into the structure.

3.2.4.3Zero-indexed Addressing

In a zero-indexed instruction, you specify the address as a 16-bit variable; the offset is zero, and you can express it in one of three ways: [0], [ZERO_REG], or nothing. Each of the following load instructions loads AX with the contents of the variable THISVAR.

LD AX,THISVAR[0]

LD AX,THISVAR[ZERO_REG]

LD AX,THISVAR

The following instructions also use zero-indexed addressing:

ADD	AX,1234H[ZERO_REG]	; AX ← AX + MEM_WORD(1234H)
POP	5678H[ZERO_REG]	;	MEM_WORD(5678H) ← MEM_WORD(SP)
		;	SP ← SP + 2

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