SPECIAL OPERATING MODES

Table 14-2. Operating Mode Control and Status Registers (Continued)

 

 

 

Mnemonic

Address

Description

 

 

 

P1_DIR (MH)

1F9BH

Port x Direction

P2_DIR

1FD2H

Each bit of Px_DIR controls the direction of the corresponding pin.

P5_DIR

1FF3H

Clearing a bit configures a pin as a complementary output; setting

P7_DIR (MD)

1FD3H

a bit configures a pin as an input or open-drain output. (Open-

 

 

 

 

drain outputs require external pull-ups.)

P1_MODE(MH)

1F99H

Port x Mode

P2_MODE

1FD0H

Each bit of Px_MODE controls whether the corresponding pin

P5_MODE

1FF1H

functions as a standard I/O port pin or as a special-function

P7_MODE(MD)

1FD1H

signal. Setting a bit configures a pin as a special-function signal;

 

 

 

 

clearing a bit configures a pin as a standard I/O port pin.

P1_REG (MH)

1F9DH

Port x Data Output

P2_REG

1FD4H

For an input, set the corresponding Px_REG bit.

P5_REG

1FF5H

For an output, write the data to be driven out by each pin to the

P7_REG (MD)

1FD5H

corresponding bit of Px_REG. When a pin is configured as

 

 

 

 

standard I/O (Px_MODE.y = 0), the result of a CPU write to

 

 

Px_REG is immediately visible on the pin. When a pin is

 

 

configured as a special-function signal (Px_MODE.y = 1), the

 

 

associated on-chip peripheral or off-chip component controls the

 

 

pin. The CPU can still write to Px_REG, but the pin is unaffected

 

 

until it is switched back to its standard I/O function.

 

 

This feature allows software to configure a pin as standard I/O

 

 

(clear Px_MODE.y), initialize or overwrite the pin value, then

 

 

configure the pin as a special-function signal (set Px_MODE.y). In

 

 

this way, initialization, fault recovery, exception handling, etc., can

 

 

be done without changing the operation of the associated

 

 

peripheral.

14.2 REDUCING POWER CONSUMPTION

Both power-saving modes conserve power by disabling portions of the internal clock circuitry (Figure 14-1). The following paragraphs describe both modes in detail.

14-3

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Intel 8XC196MH, 8XC196MD, 8XC196MC manual Reducing Power Consumption, P1MODEMH, P7MODEMD 1FD1H, P1REG MH 1F9DH