Intel 8XC196MC, 8XC196MD, 8XC196MH manual Capture Mode on, Compare Mode RT

EVENT PROCESSOR ARRAY (EPA)

EPAx_CON (Continued)	Address:	See Table 11-3 on page 11-3
x = 0–1 (8XC196MH)	Reset State:	00H
x = 0–3 (8XC196MC)
x = 0–5 (8XC196MD)

The EPA control (EPAx_CON) registers control the functions of their assigned capture/compare channels.

x = 0, 2, 4

7

TB CE M1 M0

0

RE WGR ROT ON/RT

7 0

x = 1, 3, 5

TB

CE

M1

M0

RE

AD

ROT

ON/RT

Bit	Bit		Function
Number	Mnemonic
1	ROT	Reset Opposite Timer
		Controls different functions for capture and compare modes.
		In Capture Mode:
		0	= causes no action
		1	= resets the opposite timer
		In Compare Mode:
		Selects the timer that is to be reset if the RT bit is set.
		0	= selects the reference timer for possible reset
		1	= selects the opposite timer for possible reset
		The TB bit (bit 7) selects which is the reference timer and which is the
		opposite timer.
0	ON/RT	Overwrite New/Reset Timer
		The ON/RT bit functions as overwrite new in capture mode and reset
		timer in compare mode.
		In Capture Mode (ON):
		An overrun error is generated when an input capture occurs while the
		event-time register (EPAx_TIME) and its buffer are both full. When an
		overrun occurs, the ON bit determines whether old data is overwritten or
		new data is ignored:
		0	= ignores new data
		1	= overwrites old data in the buffer
		In Compare Mode (RT):
		0	= disables the reset function
		1	= resets the ROT-selected timer

Figure 11-10. EPA Control (EPAx_CON) Registers (Continued)

11-21