Intel 8XC196MH, 8XC196MD, 8XC196MC manual SPxSTATUS, RPE/RB8 TXE

Models: 8XC196MD 8XC196MH 8XC196MC

1 579
Download 579 pages 24.12 Kb
Page 529
Image 529

8XC196MC, MD, MH USER’S MANUAL

SPx_STATUS

SPx_STATUS

Address:

1F81H, 1F89H

x = 0–1 (8XC196MH)

Reset State:

00H

The serial port status (SPx_STATUS) register contains bits that indicate the status of serial port x.

8XC196MH

7

RPE/RB8

RI

TI

FE

 

 

 

 

0

TXE

OE

 

 

 

 

 

Bit

Bit

Function

 

 

Number

Mnemonic

 

 

 

 

 

 

 

 

 

 

7

RPE/RB8

Received Parity Error/Received Bit 8

 

 

 

 

RPE is set if parity is disabled (SPx_CON.2 = 0) and the ninth data bit

 

 

 

 

received is high.

 

 

 

 

RB8 is set if parity is enabled (SPx_CON.2 = 1) and a parity error occurred.

 

 

 

 

Reading SPx_STATUS clears this bit.

 

 

 

 

 

 

 

6

RI

Receive Interrupt

 

 

 

 

This bit is set when the last data bit is sampled. Reading SPx_STATUS

 

 

 

 

clears this bit.

 

 

 

 

 

 

 

5

TI

Transmit Interrupt

 

 

 

 

This bit is set at the beginning of the stop bit transmission. Reading

 

 

 

 

SPx_STATUS clears this bit.

 

 

 

 

 

 

 

4

FE

Framing Error

 

 

 

 

This bit is set if a stop bit is not found within the appropriate period of time.

 

 

 

 

Reading SPx_STATUS clears this bit.

 

 

 

 

 

 

 

3

TXE

SBUFx_TX Empty

 

 

 

 

This bit is set if the transmit buffer is empty and ready to accept up to two

 

 

 

 

bytes. It is cleared when a byte is written to SBUFx_TX.

 

 

 

 

 

 

 

2

OE

Overrun Error

 

 

 

 

This bit is set if data in the receive shift register is loaded into SBUFx_RX

 

 

 

 

before the previous bit is read. Reading SPx_STATUS clears this bit.

 

 

 

 

 

 

 

1:0

Reserved; for compatibility with future devices, write zeros to these bits.

 

 

 

 

 

 

 

 

 

 

 

C-52

Page 529
Image 529
Intel 8XC196MH, 8XC196MD, 8XC196MC manual SPxSTATUS, RPE/RB8 TXE