Intel 8XC196MC, 8XC196MD, 8XC196MH manual Software Protection Features and Guidelines

Models: 8XC196MD 8XC196MH 8XC196MC

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PROGRAMMING CONSIDERATIONS

If a procedure returns a value to the calling code (as opposed to modifying more global variables), the result is returned in the temporary storage space (TMPREG0, in this example) starting at 1CH. TMPREG0 is viewed as either an 8-, 16-, or 32bit variable, depending on the type of the proce- dure.

The standard calling convention adopted by the C programming language has several key fea- tures:

Procedures can always assume that the eight bytes of register file memory starting at 1CH can be used as temporary storage within the body of the procedure.

Code that calls a procedure must assume that the procedure modifies the eight bytes of register file memory starting at 1CH.

Code that calls a procedure must assume that the procedure modifies the processor status word (PSW) condition flags because procedures do not save and restore the PSW.

Function results from procedures are always returned in the variable TMPREG0.

The C programming language allows the definition of interrupt procedures, which are executed when a predefined interrupt request occurs. Interrupt procedures do not conform to the rules of normal procedures. Parameters cannot be passed to these procedures and they cannot return re- sults. Since interrupt procedures can execute essentially at any time, they must save and restore both the PSW and TMPREG0.

3.5SOFTWARE PROTECTION FEATURES AND GUIDELINES

The device has several features to assist in recovering from hardware and software errors. The unimplemented opcode interrupt provides protection from executing unimplemented opcodes. The hardware reset instruction (RST) can cause a reset if the program counter goes out of bounds. The RST instruction opcode is FFH, so the processor will reset itself if it tries to fetch an instruc- tion from unprogrammed locations in nonvolatile memory or from bus lines that have been pulled high. The watchdog timer (WDT) can also reset the device in the event of a hardware or software error.

We recommend that you fill unused areas of code with NOPs and periodic jumps to an error rou- tine or RST instruction. This is particularly important in the code surrounding lookup tables, since accidentally executing from lookup tables will cause undesired results. Wherever space allows, surround each table with seven NOPs (because the longest device instruction has seven bytes) and a RST or a jump to an error routine. Since RST is a one-byte instruction, the NOPs are unneces- sary if RSTs are used instead of jumps to an error routine. This will help to ensure a speedy re- covery from a software error.

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Intel 8XC196MC, 8XC196MD, 8XC196MH manual Software Protection Features and Guidelines