Intel 8XC196MH manual Microcontroller Meets These Specifications, Address Setup to ALE/ADV# Low

Models: 8XC196MD 8XC196MH 8XC196MC

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8XC196MC, MD, MH USER’S MANUAL

 

Table 15-9. Microcontroller Meets These Specifications

Symbol

Definition

 

 

TAVLL

Address Setup to ALE/ADV# Low

 

Length of time address is valid before ALE/ADV# falls. Useful when using an external latch to

 

demultiplex the address from the address data bus.

 

 

CLKOUT High CLKOUT Low

TCHCL

 

CLKOUT pulse width. Useful when using CLKOUT to clock external devices.

 

 

CLKOUT Cycle Time

TCLCL

 

The period of the CLKOUT signal; equal to 2TXTAL1.

CLKOUT Low to ALE/ADV# High

TCLLH

TLHLH

ALE Cycle Time

 

Minimum time between two ALE rising edges.

 

 

TLHLL

ALE High to ALE Low

 

ALE pulse width. Useful when using an external latch to demultiplex the address from the

 

address data bus.

 

 

TLLAX

AD15:0 Hold after ALE/ADV# Low

 

Length of time address is valid after ALE/ADV# falls. Useful when using an external latch to

 

demultiplex the address from the address data bus.

 

 

ALE/ADV# Low to CLKOUT High

TLLCH

TLLRL

ALE/ADV# Low to RD# Low

 

Length of time after ALE/ADV# falls before the microcontroller asserts RD#. Maximum time a

 

memory system has to decode the address before the microcontroller asserts RD#.

 

 

TLLWL

ALE/ADV# Low to WR# Low

 

Length of time after ALE/ADV# falls before the microcontroller asserts WR#. Maximum time a

 

memory system has to decode the address before the microcontroller asserts WR#.

 

 

TQVWH

Output Data Valid to WR# High

 

Length of time output data is valid before the microcontroller deasserts WR#.

 

 

TRHAX

Address (high byte) Hold after RD# High

 

Minimum time the high byte of the address (when using an 8-bit data bus) is valid after the

 

microcontroller deasserts RD#.

 

 

TRHBX

BHE#, INST Hold after RD# High

 

Minimum time these signals are valid after the microcontroller deasserts RD#.

 

 

TRHLH

RD# High to ALE High

 

Time between the microcontroller deasserting RD# and the next ALE pulse. Maximum time the

 

memory system has to put data on the bus before the next address cycle.

 

 

TRLAZ

RD# Low to Address Float

 

Time after the microcontroller deasserts RD# until it stops driving the address on the bus.

 

 

TRLRH

RD# Low to RD# High

 

RD# pulse width.

 

 

The CLKOUT pin is available only on the 8XC196MC, MD microcontrollers.

15-34

Page 349
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Intel 8XC196MH, 8XC196MD, 8XC196MC manual Microcontroller Meets These Specifications, Address Setup to ALE/ADV# Low