Intel 8XC196MD, 8XC196MH, 8XC196MC manual Index-2

8XC196MC, MD, MH USER’S MANUAL

AND instruction, A-2, A-8, A-41, A-42, A-48, A-53

ANDB instruction, A-2, A-8, A-9, A-42, A-43, A-48, A-53

ANGND, 12-5, 13-1, B-14

ApBUILDER software, downloading, 1-10 Application notes, ordering, 1-6

Arithmetic instructions, A-47, A-48, A-52, A-53 Assert, defined, 1-3

Auto programming mode, 16-25–16-28 algorithm, 16-28

circuit, 16-25–16-26 memory map, 16-27 PCCB, 16-27

security key programming, 16-29

B

Baud rate

SIO port, 7-12–7-14 Baud-rate generator

SIO port, 7-12 BAUD_VALUE, 7-13 BCLK1:0, B-14 BCLKx, 7-2

BHE#, B-14 BIT, defined, 3-2

Bit-test instructions, A-17 Block diagram

A/D converter, 12-1 address/data bus, 6-15 clock circuitry, 2-7 core and peripherals, 2-3 EPA, 11-2

frequency generator, 8-1

infrared remote control application, 8-5 I/O ports, 6-3, 6-8, 6-15, 6-16

SIO port, 7-1

waveform generator, 9-2 Block transfer mode‚ See PTS

BMOV instruction, A-2, A-9, A-45, A-49 BMOVI instruction, A-3, A-9, A-10, A-45, A-49 BR (indirect) instruction, A-2, A-10, A-49, A-55 Bus controller, 2-6, 16-6

Bus-control modes, 15-21–15-31 address valid strobe, 15-27–15-29

address valid with write strobe, 15-30–15-31

Index-2

standard, 15-22–15-24 write strobe, 15-25–15-26

Bus-control signals, 15-21 Bus-width modes

16-bit data bus, 15-14

8-bit data bus, 15-16 dynamic data bus, 15-13 dynamic example, 15-24

BUSWIDTH, 16-25, 16-27, B-15

idle, powerdown, reset status, B-23, B-25 timing, 15-11

definitions, 15-13 diagram, 15-12 requirements, 15-13

BYTE, defined, 3-2

C

Call instructions, A-50, A-55, A-56

Carry (C) flag, 3-4, A-4, A-5, A-11, A-18, A-19, A-20, A-21, A-31

Cascading timers, 11-7 CCB fetch

and BHE#, 6-13

and P5.5, 6-13

and P5.6, 6-13 and READY, 6-13

CCBs, 4-3, 13-8

security-lock bits, 16-29–16-30 CCBs, See also chip configuration bytes CCR0, 14-2

CCRs, 13-8, 14-5 security-lock bits, 16-17

CCRs, See also chip configuration registers Chip configuration

and bus contention, 15-11 and reset, 15-6

bytes, 15-5

chip configuration register 0, 15-7, C-11 chip configuration register 1, 15-9, C-13 registers, 15-5

Clear, defined, 1-3 CLKOUT, 14-1, B-15

and internal timing, 2-7 and interrupts, 5-6 and RESET#, 13-8

idle, powerdown, reset status, B-24 reset status, 6-7