REGISTERS

 

 

WG_COMPx

 

 

 

WG_COMPx

Address:

1FC2H,1FC4H,1FC6H

x = 1–3

Reset State:

0000H

The phase compare (WG_COMPx) register controls the duty cycle of each phase. Write a value to each phase compare register to specify the length of time that the associated outputs will remain asserted.

Changing the WG_RELOAD value changes both the carrier period and the duty cycle because the outputs remain asserted for a constant length of time, while the counter takes longer to cycle. To change the carrier period without changing the duty cycle, you must proportionally change both WG_RELOAD and WG_COMPx at the same time, immediately after the interrupt.

15

 

0

 

 

Compare

 

 

 

Bit

 

Function

Number

 

 

 

 

 

 

15:0

Compare

 

 

These bits determine the length of time that the associated outputs are asserted.

 

Use the following formulas to calculate output assertion time and duty cycle.

 

TO UTPU T = multiplier----------- × WG_COMPx-----------------------------------------------------

 

 

FXT AL1

 

 

WG_COMPx

 

Duty Cycle = WG-- _RELOAD × 100%-----------------------------------

 

where:

 

 

TOUTPUT

= total time output is asserted, in µs

 

FXTAL1

= input frequency on XTAL1 pin, in MHz

 

multiplier

= 4 for center-aligned modes; 2 for edge-aligned modes

 

WG_RELOAD

= 16-bit WG_RELOAD value WG_COMPx

 

WG_COMPx

= 16-bit WG_COMPx value WG_RELOAD

 

 

 

C-59

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Intel 8XC196MC, 8XC196MD, 8XC196MH manual WGCOMPx, Wgcomp Address