4.2 8-Core LV70W Thermal Specifications | Intel E5-1600, E5-4600

Thermal Management Specifications

Table 5-28. 8-Core LV95W Thermal Profiles, Embedded Server SKU (Sheet 2 of 2)

	Maximum TCASE (ºC)		Maximum DTS (ºC)

Power (W)	Long Term	Short Term	Long Term	Short Term

65	66.6	81.6	74	89

70	67.7	82.7	75	90

75	68.7	83.7	77	92

80	69.8	84.8	79	94

85	70.9	85.9	80	95

90	72.0	87.0	82	97

95	73.0	88.0	84	99

5.1.4.28-Core LV70W Thermal Specifications

Table 5-29. Tcase: 8-Core LV70W Thermal Specifications, Embedded Server SKU

	Core	Thermal Design	Minimum	Maximum	Notes
	Frequency	Power (W)	TCASE (°C)	TCASE (°C)	Notes
	Frequency	Power (W)	TCASE (°C)	TCASE (°C)
	Launch to FMB	70	5	See Figure 5-30and Table 5-30	1, 2, 3, 4, 5

Notes:

1.These values are specified at VCC_MAX for all processor frequencies. Systems must be designed to ensure the processor is not to be subjected to any static VCC and ICC combination wherein VCC exceeds VCC_MAX at specified ICC. Please refer to the electrical loadline specifications in Section 7.8.1.

2.Thermal Design Power (TDP) should be used for processor thermal solution design targets. TDP is not the maximum power that the processor can dissipate. TDP is measured at maximum TCASE.

3.These specifications are based on initial final silicon simulations, which will be updated as further characterization data becomes available.

4.Power specifications are defined at all VIDs found in Table 7-3. The processor may be delivered under multiple VIDs for each frequency.

5.FMB, or Flexible Motherboard, guidelines provide a design target for meeting all planned processor frequency requirements.

Figure 5-30. Tcase: 8-Core LV70W Thermal Profile, Embedded Server SKU

Intel® Xeon® Processor E5-1600/E5-2600/E5-4600 Product Families	135
Datasheet Volume One

Image 135

Contents

May Datasheet Volume OnePage Contents Package Thermal Specifications Mechanical Specifications 245 10.2.1 Figures Tcase 8-Core 135W Thermal Profile 2U Tables Core 150W Thermal Profile, Workstation Platform SKU Only Fault Resilient Booting Output Tri-State Signals Initial Release March Revision Description Revision Date Number Datasheet Volume One Introduction Overview Processor Feature Details Interfaces Supported TechnologiesSystem Memory Support PCI Express NTB Direct Media Interface Gen 2 DMI2 Intel QuickPath Interconnect Intel QPILink System States Support Power Management SupportPlatform Environment Control Interface Peci Processor Package and Core States Intel QuickPath Interconnect Thermal Management SupportPackage Summary Terminology IOV IMCIIO IHS Nebs LLCLrdimm Nctf Udimm Related DocumentsTDP Tsod Referenced Documents Sheet 2 State of Data System Memory Interface System Memory Technology SupportSystem Memory Timing Support PCI Express* Architecture PCI Express* Interface Physical Layer PCI Express* Configuration MechanismTransaction Layer Data Link Layer Processor/PCH Compatibility Assumptions 1 DMI2 Error FlowDMI2/PCI Express* Interface Intel QuickPath Interconnect Interfaces Peci Client Capabilities Summary of Processor-specific Peci CommandsCommand Supported on the Processor Platform Environment Control Interface Peci Platform Manageability Client Command SuiteProcessor Interface Tuning and Diagnostics Thermal Management GetDIB Minor Revision Number Meaning Minor Revision Supported Command SuiteDevice Info Revision Number GetTemp Client Address Write Length Read LengthTemp70 Temp158 Response Meaning RdPkgConfigSupported Responses GetTemp Response Definition RdPkgConfig Response Definition WrPkgConfig Electrical error or AW FCS failure WrPkgConfig Response Definition Sheet 1 Package Configuration Capabilities WrPkgConfig Response Definition Sheet 2Dram Thermal and Power Optimization Capabilities Dram Rank TemperatureDram Power By power Performance Dram Thermal Estimation Configuration Data Read/WriteLimit Data Limit Index Encoding Physical Channel# Physical DIMM# Dram Rank Temperature WriteDimm Temperature Read Channel & Dimm Index Decoding Dimm Ambient Temperature Write / Read Dram Channel Temperature ReadDIMM# Dram Power Info Read Accumulated Dram Energy ReadAccumulated Dram Energy Data Dram Power Limit Data Write / Read Maximum TimeTypical Value Dram Power Limit Performance Status Read Dram PowerlimitReserved CSR Mcaerrsrclog CPU Thermal and Power Optimization CapabilitiesCpuid CSR did Read status Read Mode bit AccumulatedPower Limit for VCC Power Limits For Read Package PowerModes Package Power Indicator Read Flag Package Identifier ReadProcessor Type Max Thread Package Power SKU Unit Read Power Control Register Unit Calculations Package Power SKU ReadUnit Field Value Calculation Default Value Peci Temperature Wake on Peci Mode Bit Write / ReadPackage Temperature Read Maximum Package Power Window Per Core DTS Temperature Read Temperature Target ReadPackage Thermal Status Read / Clear 4 3 2 1 Thermal Averaging Constant Write / ReadThermally Constrained Time Read Current Limit Read Accumulated Energy Status Read Power Limit for the VCC Power Plane Write / Read Package Power Limits For Multiple Turbo Modes Control Time Clamp Power LimitMode Enable Window #2 Mode #2 Enable #2 Package Power Limit Performance Status Read Acpi P-T Notify Write & Read Efficient Performance Indicator Read Thermal Margin Read Read Mode bit 11 = ‘0’Core ID Bit Read Mode bit 11 = ‘1’ Caching Agent TOR Read Processor ID Enumeration RdIAMSR 42. Processor ID Construction Example 11. RdIAMSR Services Summary Sheet 1 10. RdIAMSR Response DefinitionRdIAMSR Capabilities Or ID Address Meaning Sor ID Byte Dword 11. RdIAMSR Services Summary Sheet 2 44. PCI Configuration Address RdPCIConfig Appropriate RdPCIConfigLocal12. RdPCIConfig Response Definition Timely fashion. Retry is appropriate 13. RdPCIConfigLocal Response Definition Sheet 1 PCI Configuration Address0x05 0x02,0x03,0x05 0xe1 Definition 13. RdPCIConfigLocal Response Definition Sheet 2 WrPCIConfigLocal Completion 14. WrPCIConfigLocal Response DefinitionCmd Code 0xe5 Client Management Power-up SequencingWrPCIConfigLocal Capabilities 16. Peci Client Response During Power-Up Sheet 1 16. Peci Client Response During Power-Up Sheet 2 Device DiscoveryClient Addressing 17. Socket ID Strapping 18. Power Impact of Peci Commands vs. C-statesCommand Power Impact States Processor Reset System Service Processor SSP Mode SupportBMC Init Mode Processor Error Handling Originator Retry and Timeout PolicyLink Init Mode 19. Domain ID Definition Multi-Domain Commands20. Multi-Domain Command Code Reference Enumerating Peci Client Capabilities 21. Completion Code Pass/Fail Mask Client ResponsesAbort FCS Completion Codes Interpretation DTS Temperature DataOriginator Responses Format Reserved Values Temperature Filtering24. Error Codes and Descriptions Error Code Description Datasheet Volume One Intel VT-x Objectives Intel Virtualization Technology Intel VT Intel VT-x Features Intel VT-d Features SupportedIntel VT-d Objectives Security Technologies Intel Virtualization Technology Processor ExtensionsIntel Trusted Execution Technology Intel Advanced Encryption Standard Instructions Intel AES-NI Intel Trusted Execution Technology Server Extensions Intel Turbo Boost Operating Frequency Execute Disable Bit Intel Intelligent Power Technology Enhanced Intel SpeedStep TechnologyIntel Advanced Vector Extensions Intel AVX Intel Dynamic Power Technology Intel DPT Technologies Package C-State Support Sheet 1 Acpi States SupportedSystem States System States Core C-State Support System Memory Power States Sheet 1Integrated Memory Controller States Package C-State Support Sheet 2 4 DMI2/PCI Express Link States Intel QuickPath Interconnect States6 G, S, and C State Combinations Processor Core/Package Power Management Low-Power Idle StatesEnhanced Intel SpeedStep Technology Idle Power Management Breakdown of the Processor Cores Requesting Low-Power Idle States PLVLx to Mwait Conversion Core C-statesCore C0 State Core C1/C1E State State Auto-Demotion Core C3 StateCore C6 State Core C7 State Package C-States Package C-State Core Coordination of Core Power States at the Package LevelPackage C0 Package C1/C1E Package C2 State Package C3 StatePackage C6 State TDP SKUs C1E W C3 W C6 W Core / 6-Core System Memory Power ManagementPackage C-State Power Specifications 10. Package C-State Power Specifications Self Refresh Exit CKE Power-DownSelf Refresh Self Refresh Entry DMI2/PCI Express* Power Management Dram I/O Power ManagementDLL and PLL Shutdown 100 Thermal Specifications Package Thermal Specifications Tcase and DTS Based Thermal Specifications Temperaturetarget MSR 3.1 8-Core 150W Thermal Specifications Processor Thermal ProfilesProcessor SKU Summary Table Thermal Management Specifications Core 150W Thermal Profile, Workstation Platform SKU Only Power W Maximum T Case C Maximum Dtsc 3.2 8-Core 135W Thermal Specifications Tcase 8-Core 135W Thermal Specifications 2U3, 4 Core 135W Thermal Profile U Sheet 1 Power W Maximum Tcase C Maximum DTS C 3.3 8/6-Core 130W Thermal Specifications Power W Maximum T Case C Maximum DTS CCore 135W Thermal Profile U Sheet 2 Tcase 8/6-Core 130W Thermal Profile 1U 6-Core 130W Thermal Profile U Sheet 1 Power W Maximum Tcase C Maximum DTS C Core 6-Core 130W Thermal Profile U Sheet 2 3.4 6-Core 130W 1S WS Thermal SpecificationsTcase 6-Core 130W 1S WS Thermal Specifications Power W Maximum T Case C Maximum DTS C Core Core 130W 1S WS Thermal Profile Table Sheet 1 DTS 6-Core 130W 1S WS Thermal Profile 3.5 8-Core 115W Thermal Specifications 10. Tcase 8-Core 115W Thermal Specifications 1UCore 130W 1S WS Thermal Profile Table Sheet 2 10. Tcase 8-Core 115W Thermal Profile 1U 11 -Core 115W Thermal Profile U 3.6 8/6-Core 95W Thermal Specifications 12. Tcase 8/6-Core 95W Thermal Profile 1U 13 /6-Core 95W Thermal Profile U Sheet 1 14. DTS 6-Core 95W Thermal Profile 1U 3.7 8-Core 70W Thermal Specifications 14. Tcase 8-Core 70W Thermal Specifications 1U13 /6-Core 95W Thermal Profile U Sheet 2 15 -Core 70W Thermal Profile U 16. DTS 8-Core 70W Thermal Profile 1U 16. Tcase 6-Core 60W Thermal Specifications 1U 3.8 6-Core 60W Thermal Specifications 17 -Core 60W Thermal Profile U 18. DTS 6-Core 60W Thermal Profile 1U 18. Tcase 4-Core 130W Thermal Specifications 2U 3.9 4-Core 130W Thermal Specifications 19 -Core 130W Thermal Profile U Sheet 1 20. DTS 4-Core 130W Thermal Profile 2U 19 -Core 130W Thermal Profile U Sheet 2 3.10 4-Core 130W 1S WS Thermal Specifications 21. Tcase 4-Core 130W 1S WS Thermal Profile 3.11 4-Core 95W Thermal Specifications 22. Tcase 4-Core 95W Thermal Specifications 1U21 -Core 130W 1S WS Thermal Profile Table 23. Tcase 4-Core 95W Thermal Profile 1U 3.12 4/2-Core 80W Thermal Specifications 24. Tcase 4/2-Core 80W Thermal Specifications 1U23 -Core 95W Thermal Profile U 25. Tcase 4/2-Core 80W Thermal Profile 1U 25 /2-Core 80W Thermal Profile U Sheet 1 Maximum Tcase Maximum DTS C Power W Core 25 /2-Core 80W Thermal Profile U Sheet 2 4.1 8-Core LV95W Thermal SpecificationsMaximum T Case Maximum DTS C Power W Core Embedded Server Processor Thermal Profiles 28. Tcase 8-Core LV95W Thermal Profile, Embedded Server SKU 29. DTS 8-Core LV95W Thermal Profile, Embedded Server SKU 30. Tcase 8-Core LV70W Thermal Profile, Embedded Server SKU 4.2 8-Core LV70W Thermal Specifications 31. DTS 8-Core LV70W Thermal Profile, Embedded Server SKU Thermal Metrology 32. Case Temperature Tcase Measurement Location Processor Core Thermal Features Processor TemperatureAdaptive Thermal Monitor 33. Frequency and Voltage Ordering Frequency/SVID Control On-Demand Mode Prochotn SignalClock Modulation Thermtripn Signal Integrated Memory Controller IMC Thermal FeaturesDram Throttling Options MEMHOTC01N and MEMHOTC23N Signal Hybrid Closed Loop Thermal Throttling CLTTHybridIntegrated Dual SMBus Master Controllers for SMI System Memory Interface Signals Signal Name DescriptionMemory Channel DDR0, DDR1, DDR2, DDR3 Memory Channel Miscellaneous PCI Express* Based Interface SignalsPCI Express* Port 1 Signals PCI Express* Port 2 Signals Sheet 1 PCI Express* Port 2 Signals Sheet 2 PCI Express* Port 3 SignalsPCI Express* Miscellaneous Signals Sheet 1 Intel QuickPath Interconnect Signals DMI2/PCI Express* Port 0 Signals Peci Signal System Reference Clock SignalsJtag and TAP Signals 14. Processor Asynchronous Sideband Signals Sheet 1 Serial VID Interface Svid SignalsProcessor Asynchronous Sideband and Miscellaneous Signals 13. Svid Signals 14. Processor Asynchronous Sideband Signals Sheet 2 16. Power and Ground Signals Sheet 1 Processor Power and Ground Supplies14. Processor Asynchronous Sideband Signals Sheet 3 15. Miscellaneous Signals 16. Power and Ground Signals Sheet 2 152 3 DMI2/PCI Express* Signals Processor SignalingSystem Memory Interface Signal Groups PCI Express* Signals Platform Environmental Control Interface Peci System Reference Clocks BCLK0/1DP, BCLK0/ 1DNInput Device Hysteresis PLL Power Supply Jtag and Test Access Port TAP SignalsProcessor Sideband Signals Power, Ground and Sense Signals Voltage Identification VID Power and Ground LandsPower Number Comments Ground Lands Decoupling Guidelines SetVID-Decay Command Svid CommandsSetVID Fast Command SetVID Slow Command VR Power-State Transitions Svid Power State Functions SetPS 159 Svid Voltage Rail AddressingSvid Address Usage PWM Address HEX Processor Signal Description Signal Group SummaryReserved or Unused Signals Signal Description Buffer Types Sheet 1 Signal Groups Sheet 1 Signal Description Buffer Types Sheet 2 Signal Groups Sheet 2 Miscellaneous Signals Signal Groups Sheet 3Serial VID Interface Svid Signals Processor Asynchronous Sideband Signals Signal Name Pull Up /Pull Rail Value Units Down Power-On Configuration POC OptionsSignals with On-Die Termination Power-On Configuration Option Lands Mixing Processors Fault Resilient Booting FRBFault Resilient Booting Output Tri-State Signals Output Tri-State Signal Groups Signals Processor Absolute Minimum and Maximum Ratings Symbol Parameter Min Max UnitFlexible Motherboard Guidelines FMB Absolute Maximum and Minimum Ratings 10. Storage Condition Ratings Storage Conditions Specifications DC Specifications VCC VID Voltage and Current Specifications11. Voltage Specification Symbol Parameter Voltage Min Typ Max Unit Plane Core/6-core 12. Processor Current SpecificationsParameter Symbol Processor TDP / Core Count Max a Definition CC a 13 /6 Core Processor VCC Static and Transient Tolerance ICC a VID 3,4,5,6 100 105 110 115 120 125 130 135 140 145 150 174 Die Voltage Validation VCC Overshoot Specifications15. VCC Overshoot Specifications Sheet 1 Symbol Parameter Min Max Units Signal DC Specifications 15. VCC Overshoot Specifications Sheet 216. DDR3 and DDR3L Signal DC Specifications Sheet 1 Control Signals 16. DDR3 and DDR3L Signal DC Specifications Sheet 2Reference Clock Signal Command Signals Symbol Definition and Conditions Min Max Units 17. Peci DC Specifications18. System Reference Clock BCLK0/1 DC Specifications 19. SMBus DC Specifications Sheet 1 Symbol Parameter Min Typ Max Units 19. SMBus DC Specifications Sheet 220. Jtag and TAP Signals DC Specifications 21. Serial VID Interface Svid DC Specifications Sheet 1 Open Drain Cmos Odcmos Signals 21. Serial VID Interface Svid DC Specifications Sheet 222. Processor Asynchronous Sideband DC Specifications CMOS1.05v Signals Reset and Miscellaneous Signal DC Specifications PCI Express* DC Specifications3.2 DMI2/PCI Express* DC Specifications Intel QuickPath Interconnect DC Specifications Vcross MIN = 250mV StableVRB-Differential Vcross MAX = 550mV Signal Quality 1 DDR3 Signal Quality Specifications2 I/O Signal Quality Specifications Overshoot/Undershoot Tolerance Intel QuickPath Interconnect Signal Quality SpecificationsInput Reference Clock Signal Quality Specifications 24. Processor I/O Overshoot/Undershoot Specifications Reading Overshoot/Undershoot Specification Tables Overshoot/Undershoot Pulse DurationActivity Factor 11. Maximum Acceptable Overshoot/Undershoot Waveform Land Name Land No Buffer Type Direction Listing by Land NameLand Name Sheet 1 Land Name Sheet 2 Land Name Sheet 4 Land Name Sheet 3 Land Name Sheet 6 Land Name Sheet 5 Land Name Sheet 8 Land Name Sheet 7 Land Name Sheet 10 Land Name Sheet 9 Land Name Sheet 12 Land Name Sheet 11 Land Name Sheet 14 Land Name Sheet 13 Land Name Sheet 16 Land Name Sheet 15 Land Name Sheet 18 Land Name Sheet 17 Land Name Sheet 20 Land Name Sheet 19 Land Name Sheet 22 Land Name Sheet 21 Land Name Sheet 24 Land Name Sheet 23 Land Name Sheet 26 Land Name Sheet 25 Land Name Sheet 28 Land Name Sheet 27 Land Name Sheet 30 Land Name Sheet 29 Land Name Sheet 32 Land Name Sheet 31 VCCD23 Land Name Sheet 33Land Name Sheet 34 VCCD01 Land Name Sheet 36 Land Name Sheet 35 Land Name Sheet 38 Land Name Sheet 37 Land Name Sheet 40 Land Name Sheet 39 Land Name Sheet 42 Land Name Sheet 41 Land Name Sheet 44 Land Name Sheet 43 Land Name Sheet 46 Land Name Sheet 45 Vttd Land Name Sheet 47Land Name Sheet 48 Vtta Land Name Sheet 49 Land No Land Name Buffer Type Direction Listing by Land NumberLand Number Sheet 1 Land Number Sheet 2 Land Number Sheet 4 Land Number Sheet 3 Land Number Sheet 6 Land Number Sheet 5 Land Number Sheet 8 Land Number Sheet 7 Land Number Sheet 10 Land Number Sheet 9 Land Number Sheet 12 Land Number Sheet 11 Land Number Sheet 14 Land Number Sheet 13 Land Number Sheet 16 Land Number Sheet 15 Land Number Sheet 18 Land Number Sheet 17 Land Number Sheet 20 Land Number Sheet 19 Land Number Sheet 22 Land Number Sheet 21 Land Number Sheet 24 Land Number Sheet 23 Land Number Sheet 26 Land Number Sheet 25 Land Number Sheet 28 Land Number Sheet 27 Land Number Sheet 30 Land Number Sheet 29 Land Number Sheet 32 Land Number Sheet 31 Land Number Sheet 34 Land Number Sheet 33 Land Number Sheet 36 Land Number Sheet 35 Land Number Sheet 38 Land Number Sheet 37 Land Number Sheet 40 Land Number Sheet 39 Land Number Sheet 42 Land Number Sheet 41 Land Number Sheet 44 Land Number Sheet 43 Land Number Sheet 46 Land Number Sheet 45 Land Number Sheet 48 Land Number Sheet 47 236 Package Mechanical Drawing Processor Package Assembly Sketch 238 Processor Package Drawing Sheet 1 Processor Package Drawing Sheet 2 Package Handling Guidelines Package Loading SpecificationsPackage Insertion Specifications Processor Component Keep-Out Zones Processor Materials Processor Mass SpecificationProcessor Materials Processor Markings Available Boxed Thermal Solution Configurations Boxed Processor Specifications 244 STS200P and STS200PNRW 25.5 mm Tall Passive Heat Sinks Mechanical Specifications 246 Motherboard Keepout Zones 1 Motherboard Keepout Zones 2 Boxed Processor Specifications 248 Boxed Processor Motherboard Keepout Zones 3 TOP Surface of Motherboard Motherboard Keepout Zones 4 250 Boxed Processor Heat Sink Volumetric 1 Boxed Processor Heat Sink Volumetric 2Specifications Processor 10.4-Pin Fan Cable Connector For Active Heat Sink 11 -Pin Base Baseboard Fan Header For Active Heat Sink 21,000 25,000 28,000 Fan Power Supply STS200C Boxed Processor Cooling Requirements Boxed Processor Contents Boxed Processor 258