Intel E5-4600, CM8062101038606 Voltage and Current Specifications, Voltage Specification, Vcc Vid

Electrical Specifications

7.8.1Voltage and Current Specifications

Table 7-11. Voltage Specification

Symbol	Parameter	Voltage	Min	Typ	Max	Unit	Notes1
		Plane
VCC VID	VCC VID Range		0.6		1.35	V	2, 3
VCC	Core Voltage	VCC	See Table 7-13,Table 7-14and Figure 7-3,Figure 7-4			V	3, 4, 7, 8,
	(Launch - FMB)						12, 14, 18
VVID_STEP	VID step size during			5.0		mV	10
(Vcc, Vsa,	a transition
Vccd)
VCCPLL	PLL Voltage	VCCPLL	0.955*VCCPLL_TYP	1.8	1.045*VCCPLL_TYP	V	11, 12, 13,
							17
VCCD	I/O Voltage for DDR3	VCCD	0.95*VCCD_TYP	1.5	1.05*VCCD_TYP	V	11, 13, 14,
(VCCD_01,	(Standard Voltage)						16, 17
VCCD_23)
VCCD	I/O Voltage for	VCCD	0.95*VCCD_TYP	1.35	1.075*VCCD_TYP	V	11, 13, 14,
(VCCD_01.	DDR3L (Low Voltage)						16, 17
VCCD_23)
VTT (VTTA,	Uncore Voltage	VTT	0.957*VTT_TYP	1.05	1.043*VTT_TYP	V	3, 5, 9, 12,
VTTD)	(Launch - FMB)						13
VSA_VID	Vsa VID Range	VSA	0.6	0.965	1.20	V	2, 3, 14, 15
VSA	System Agent	VSA	VSA_VID - 0.064	VSA_VID	VSA_VID + 0.064	V	3, 6, 12, 14,
	Voltage						19
	(Launch - FMB)

Notes:

1.Unless otherwise noted, all specifications in this table apply to all processors. These specifications are based on final silicon characterization.

2.Individual processor VID values may be calibrated during manufacturing such that two devices at the same speed may have different settings.

3.These voltages are targets only. A variable voltage source should exist on systems in the event that a different voltage is required.

4.The VCC voltage specification requirements are measured across the remote sense pin pairs (VCC_SENSE and

VSS_VCC_SENSE) on the processor package. Voltage measurement should be taken with a DC to 100 MHz bandwidth oscilloscope limit (or DC to 20 MHz for older model oscilloscopes), using a 1.5 pF maximum probe capacitance, and 1MΩ minimum impedance. The maximum length of the ground wire on the probe should be less than 5 mm to ensure external noise from the system is not coupled in the scope probe.

5.The VTTA, and VTTD voltage specification requirements are measured across the remote sense pin pairs (VTTD_SENSE and VSS_VTTD_SENSE) on the processor package. Voltage measurement should be taken with a DC to 100 MHz bandwidth oscilloscope limit (or DC to 20 MHz for older model oscilloscopes), using a 1.5 pF maximum probe capacitance, and 1MΩ minimum impedance. The maximum length of the ground wire on the probe should be less than 5 mm to ensure external noise from the system is not coupled in the scope probe.

6.The VSA voltage specification requirements are measured across the remote sense pin pairs (VSA_SENSE and

VSS_VSA_SENSE) on the processor package. Voltage measurement should be taken with a DC to 100 MHz bandwidth oscilloscope limit (or DC to 20 MHz for older model oscilloscopes), using a 1.5 pF maximum probe capacitance, and 1MΩ minimum impedance. The maximum length of the ground wire on the probe should be less than 5 mm to ensure external noise from the system is not coupled in the scope probe.

7.For the 8/6-core processor refer to Table 7-13and corresponding Figure 7-3. For the 4/2-core processor refer to Table 7-14and corresponding Figure 7-4.The processor should not be subjected to any static VCC level that exceeds the VCC_MAX associated with any particular current. Failure to adhere to this specification can shorten processor lifetime.

8.Minimum VCC and maximum ICC are specified at the maximum processor case temperature (TCASE) shown in Section 5, “Thermal Management Specifications”. ICC_MAX is specified at the relative VCC_MAX point on the VCC load line. The processor is capable of drawing ICC_MAX for up to 5 seconds. Refer to Figure 7-5for further details on the average processor current draw over various time durations.

9.The processor should not be subjected to any static VTTA, VTTD level that exceeds the VTT_MAX associated with any particular current. Failure to adhere to this specification can shorten processor lifetime.

10.This specification represents the VCC reduction or VCC increase due to each VID transition, see Section 7.1.9.3, “Voltage Identification (VID)”.

11.Baseboard bandwidth is limited to 20 MHz.

12.FMB is the flexible motherboard guidelines. See Section 7.6 for FMB details.

13.DC + AC + Ripple = Total Tolerance

14.For Power State Functions see Section 7.1.9.3.5.

15.VSA_VID does not have a loadline, the output voltage is expected to be the VID value.

Intel® Xeon® Processor E5-1600/E5-2600/E5-4600 Product Families	169
Datasheet Volume One