Intel E5-1600 DMI2/PCI Express* Power Management, Dram I/O Power Management, DLL and PLL Shutdown

Power Management

4.3.2.3DLL and PLL Shutdown

Self refresh, according to configuration, may be a trigger for master DLL shut-down and PLL shut-down. The master DLL shut-down is issued by the memory controller after the DRAMs have entered self refresh.

The PLL shut-down and wake-up is issued by the PCU. The memory controller gets a signal from PLL indicating that the memory controller can start working again.

4.3.3DRAM I/O Power Management

Unused signals are tristated to save power. This includes all signals associated with an unused memory channel.

The I/O buffer for an unused signal should be tristated (output driver disabled), the input receiver (differential sense-amp) should be disabled. The input path must be gated to prevent spurious results due to noise on the unused signals (typically handled automatically when input receiver is disabled).

4.4DMI2/PCI Express* Power Management

Active State Power Management (ASPM) support using L1 state, L0s is not supported.

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Intel® Xeon® Processor E5-1600/E5-2600/E5-4600 Product Families	99
Datasheet Volume One