Thermal Management Support, Package Summary | Intel CM8062101038606

Overview

•Memory thermal monitoring via MEM_HOT_C01_N and MEM_HOT_C23_N Signals

1.3.4PCI Express

•L0s is not supported

•L1 ASPM power management capability

1.3.5Intel QuickPath Interconnect

•L0s is not supported

•L0p and L1 power management capabilities

1.4Thermal Management Support

•Digital Thermal Sensor with multiple on-die temperature zones

•Adaptive Thermal Monitor

•THERMTRIP_N and PROCHOT_N signal support

•On-Demand mode clock modulation

•Open and Closed Loop Thermal Throttling (OLTT/CLTT) support for system memory in addition to Hybrid OLTT/CLTT mode

•Fan speed control with DTS

•Two integrated SMBus masters for accessing thermal data from DIMMs

•New Memory Thermal Throttling features via MEM_HOT_C{01/23}_N signals

•Running Average Power Limit (RAPL), Processor and DRAM Thermal and Power Optimization Capabilities

1.5Package Summary

The processor socket is a 52.5 x 45 mm FCLGA package (LGA2011-0 land FCLGA10).

1.6Terminology

Term	Description

ASPM	Active State Power Management

BMC	Baseboard Management Controllers

Cbo	Cache and Core Box. It is a term used for internal logic providing ring interface to
	LLC and Core.

DDR3	Third generation Double Data Rate SDRAM memory technology that is the
	successor to DDR2 SDRAM

DMA	Direct Memory Access

DMI	Direct Media Interface

DMI2	Direct Media Interface Gen 2

DTS	Digital Thermal Sensor

ECC	Error Correction Code

20	Intel® Xeon® Processor E5-1600/E5-2600/E5-4600 Product Families
	Datasheet Volume One

Image 20

Intel CM8062101038606, E5-4600 manual Thermal Management Support, Package Summary, Terminology, Intel QuickPath Interconnect

Contents

Datasheet Volume One MayPage Contents Package Thermal Specifications Mechanical Specifications 245 10.2.1 Figures Tcase 8-Core 135W Thermal Profile 2U Tables Core 150W Thermal Profile, Workstation Platform SKU Only Fault Resilient Booting Output Tri-State Signals Revision Description Revision Date Number Initial Release March Datasheet Volume One Overview Introduction Processor Feature Details System Memory Support InterfacesSupported Technologies PCI Express NTB Link Direct Media Interface Gen 2 DMI2Intel QuickPath Interconnect Intel QPI Power Management Support Platform Environment Control Interface PeciProcessor Package and Core States System States Support Thermal Management Support Package SummaryTerminology Intel QuickPath Interconnect IMC IIOIHS IOV LLC LrdimmNctf Nebs Related Documents TDPTsod Udimm State of Data Referenced Documents Sheet 2 System Memory Timing Support System Memory InterfaceSystem Memory Technology Support PCI Express* Interface PCI Express* Architecture PCI Express* Configuration Mechanism Transaction LayerData Link Layer Physical Layer 1 DMI2 Error Flow DMI2/PCI Express* InterfaceIntel QuickPath Interconnect Processor/PCH Compatibility Assumptions Interfaces Summary of Processor-specific Peci Commands Command Supported on the ProcessorPlatform Environment Control Interface Peci Peci Client Capabilities Client Command Suite Processor Interface Tuning and DiagnosticsThermal Management Platform Manageability GetDIB Minor Revision Supported Command Suite Device InfoRevision Number Minor Revision Number Meaning Temp70 Temp158 GetTempClient Address Write Length Read Length RdPkgConfig Supported ResponsesGetTemp Response Definition Response Meaning WrPkgConfig RdPkgConfig Response Definition WrPkgConfig Response Definition Sheet 1 Electrical error or AW FCS failure Dram Thermal and Power Optimization Capabilities Package Configuration CapabilitiesWrPkgConfig Response Definition Sheet 2 Temperature Dram PowerBy power Dram Rank Dram Thermal Estimation Configuration Data Read/Write Limit DataLimit Performance Dram Rank Temperature Write Dimm Temperature ReadChannel & Dimm Index Decoding Index Encoding Physical Channel# Physical DIMM# DIMM# Dimm Ambient Temperature Write / ReadDram Channel Temperature Read Accumulated Dram Energy Data Dram Power Info ReadAccumulated Dram Energy Read Typical Value Dram Power Limit Data Write / ReadMaximum Time Reserved Dram Power Limit Performance Status ReadDram Powerlimit CPU Thermal and Power Optimization Capabilities CpuidCSR did CSR Mcaerrsrclog Read Mode bit Accumulated Power Limit forVCC Power Read status Read Package Power Modes Package PowerIndicator Read Limits For Package Identifier Read ProcessorType Flag Package Power SKU Unit Read Max Thread Unit Field Value Calculation Default Value Power Control Register Unit CalculationsPackage Power SKU Read Wake on Peci Mode Bit Write / Read Package Temperature ReadMaximum Package Power Window Peci Temperature Package Thermal Status Read / Clear Per Core DTS Temperature ReadTemperature Target Read Thermal Averaging Constant Write / Read Thermally Constrained Time ReadCurrent Limit Read 4 3 2 1 Power Limit for the VCC Power Plane Write / Read Accumulated Energy Status Read Mode Enable Package Power Limits For Multiple Turbo ModesControl Time Clamp Power Limit Package Power Limit Performance Status Read Window #2 Mode #2 Enable #2 Efficient Performance Indicator Read Acpi P-T Notify Write & Read Read Mode bit 11 = ‘0’ Core ID Bit Read Mode bit 11 = ‘1’Caching Agent TOR Read Thermal Margin Read RdIAMSR Processor ID Enumeration 42. Processor ID Construction Example RdIAMSR Capabilities 11. RdIAMSR Services Summary Sheet 110. RdIAMSR Response Definition 11. RdIAMSR Services Summary Sheet 2 Or ID Address Meaning Sor ID Byte Dword RdPCIConfig 44. PCI Configuration Address RdPCIConfigLocal 12. RdPCIConfig Response DefinitionTimely fashion. Retry is appropriate Appropriate 0x05 0x02,0x03,0x05 0xe1 Definition 13. RdPCIConfigLocal Response Definition Sheet 1PCI Configuration Address WrPCIConfigLocal 13. RdPCIConfigLocal Response Definition Sheet 2 14. WrPCIConfigLocal Response Definition Cmd Code0xe5 Completion Power-up Sequencing WrPCIConfigLocal Capabilities16. Peci Client Response During Power-Up Sheet 1 Client Management Client Addressing 16. Peci Client Response During Power-Up Sheet 2Device Discovery 18. Power Impact of Peci Commands vs. C-states Command Power ImpactStates 17. Socket ID Strapping BMC Init Mode Processor ResetSystem Service Processor SSP Mode Support Link Init Mode Processor Error HandlingOriginator Retry and Timeout Policy Multi-Domain Commands 20. Multi-Domain Command Code ReferenceEnumerating Peci Client Capabilities 19. Domain ID Definition Client Responses Abort FCSCompletion Codes 21. Completion Code Pass/Fail Mask DTS Temperature Data Originator ResponsesFormat Interpretation Temperature Filtering 24. Error Codes and DescriptionsError Code Description Reserved Values Datasheet Volume One Intel Virtualization Technology Intel VT Intel VT-x Objectives Intel VT-d Objectives Intel VT-x FeaturesIntel VT-d Features Supported Intel Trusted Execution Technology Security TechnologiesIntel Virtualization Technology Processor Extensions Intel Trusted Execution Technology Server Extensions Intel Advanced Encryption Standard Instructions Intel AES-NI Execute Disable Bit Intel Turbo Boost Operating Frequency Intel Advanced Vector Extensions Intel AVX Intel Intelligent Power TechnologyEnhanced Intel SpeedStep Technology Intel Dynamic Power Technology Intel DPT Technologies Acpi States Supported System StatesSystem States Package C-State Support Sheet 1 System Memory Power States Sheet 1 Integrated Memory Controller StatesPackage C-State Support Sheet 2 Core C-State Support 6 G, S, and C State Combinations 4 DMI2/PCI Express Link StatesIntel QuickPath Interconnect States Enhanced Intel SpeedStep Technology Processor Core/Package Power ManagementLow-Power Idle States Requesting Low-Power Idle States Idle Power Management Breakdown of the Processor Cores Core C-states Core C0 StateCore C1/C1E State PLVLx to Mwait Conversion Core C3 State Core C6 StateCore C7 State State Auto-Demotion Package C-States Coordination of Core Power States at the Package Level Package C0Package C1/C1E Package C-State Core Package C6 State Package C2 StatePackage C3 State System Memory Power Management Package C-State Power Specifications10. Package C-State Power Specifications TDP SKUs C1E W C3 W C6 W Core / 6-Core CKE Power-Down Self RefreshSelf Refresh Entry Self Refresh Exit DLL and PLL Shutdown DMI2/PCI Express* Power ManagementDram I/O Power Management 100 Package Thermal Specifications Thermal Specifications Tcase and DTS Based Thermal Specifications Temperaturetarget MSR Processor SKU Summary Table 3.1 8-Core 150W Thermal SpecificationsProcessor Thermal Profiles Thermal Management Specifications Power W Maximum T Case C Maximum Dtsc Core 150W Thermal Profile, Workstation Platform SKU Only 3, 4 3.2 8-Core 135W Thermal SpecificationsTcase 8-Core 135W Thermal Specifications 2U Power W Maximum Tcase C Maximum DTS C Core 135W Thermal Profile U Sheet 1 Core 135W Thermal Profile U Sheet 2 3.3 8/6-Core 130W Thermal SpecificationsPower W Maximum T Case C Maximum DTS C Tcase 8/6-Core 130W Thermal Profile 1U Power W Maximum Tcase C Maximum DTS C Core 6-Core 130W Thermal Profile U Sheet 1 3.4 6-Core 130W 1S WS Thermal Specifications Tcase 6-Core 130W 1S WS Thermal SpecificationsPower W Maximum T Case C Maximum DTS C Core 6-Core 130W Thermal Profile U Sheet 2 DTS 6-Core 130W 1S WS Thermal Profile Core 130W 1S WS Thermal Profile Table Sheet 1 Core 130W 1S WS Thermal Profile Table Sheet 2 3.5 8-Core 115W Thermal Specifications10. Tcase 8-Core 115W Thermal Specifications 1U 10. Tcase 8-Core 115W Thermal Profile 1U 3.6 8/6-Core 95W Thermal Specifications 11 -Core 115W Thermal Profile U 12. Tcase 8/6-Core 95W Thermal Profile 1U 14. DTS 6-Core 95W Thermal Profile 1U 13 /6-Core 95W Thermal Profile U Sheet 1 13 /6-Core 95W Thermal Profile U Sheet 2 3.7 8-Core 70W Thermal Specifications14. Tcase 8-Core 70W Thermal Specifications 1U 16. DTS 8-Core 70W Thermal Profile 1U 15 -Core 70W Thermal Profile U 3.8 6-Core 60W Thermal Specifications 16. Tcase 6-Core 60W Thermal Specifications 1U 18. DTS 6-Core 60W Thermal Profile 1U 17 -Core 60W Thermal Profile U 3.9 4-Core 130W Thermal Specifications 18. Tcase 4-Core 130W Thermal Specifications 2U 20. DTS 4-Core 130W Thermal Profile 2U 19 -Core 130W Thermal Profile U Sheet 1 3.10 4-Core 130W 1S WS Thermal Specifications 19 -Core 130W Thermal Profile U Sheet 2 21. Tcase 4-Core 130W 1S WS Thermal Profile 21 -Core 130W 1S WS Thermal Profile Table 3.11 4-Core 95W Thermal Specifications22. Tcase 4-Core 95W Thermal Specifications 1U 23. Tcase 4-Core 95W Thermal Profile 1U 23 -Core 95W Thermal Profile U 3.12 4/2-Core 80W Thermal Specifications24. Tcase 4/2-Core 80W Thermal Specifications 1U 25. Tcase 4/2-Core 80W Thermal Profile 1U Maximum Tcase Maximum DTS C Power W Core 25 /2-Core 80W Thermal Profile U Sheet 1 4.1 8-Core LV95W Thermal Specifications Maximum T Case Maximum DTS C Power W CoreEmbedded Server Processor Thermal Profiles 25 /2-Core 80W Thermal Profile U Sheet 2 28. Tcase 8-Core LV95W Thermal Profile, Embedded Server SKU 29. DTS 8-Core LV95W Thermal Profile, Embedded Server SKU 4.2 8-Core LV70W Thermal Specifications 30. Tcase 8-Core LV70W Thermal Profile, Embedded Server SKU 31. DTS 8-Core LV70W Thermal Profile, Embedded Server SKU 32. Case Temperature Tcase Measurement Location Thermal Metrology Adaptive Thermal Monitor Processor Core Thermal FeaturesProcessor Temperature Frequency/SVID Control 33. Frequency and Voltage Ordering Clock Modulation On-Demand ModeProchotn Signal Dram Throttling Options Thermtripn SignalIntegrated Memory Controller IMC Thermal Features Integrated Dual SMBus Master Controllers for SMI MEMHOTC01N and MEMHOTC23N SignalHybrid Closed Loop Thermal Throttling CLTTHybrid Memory Channel DDR0, DDR1, DDR2, DDR3 System Memory Interface SignalsSignal Name Description PCI Express* Based Interface Signals PCI Express* Port 1 SignalsPCI Express* Port 2 Signals Sheet 1 Memory Channel Miscellaneous PCI Express* Miscellaneous Signals Sheet 1 PCI Express* Port 2 Signals Sheet 2PCI Express* Port 3 Signals DMI2/PCI Express* Port 0 Signals Intel QuickPath Interconnect Signals Jtag and TAP Signals Peci SignalSystem Reference Clock Signals Serial VID Interface Svid Signals Processor Asynchronous Sideband and Miscellaneous Signals13. Svid Signals 14. Processor Asynchronous Sideband Signals Sheet 1 14. Processor Asynchronous Sideband Signals Sheet 2 Processor Power and Ground Supplies 14. Processor Asynchronous Sideband Signals Sheet 315. Miscellaneous Signals 16. Power and Ground Signals Sheet 1 16. Power and Ground Signals Sheet 2 152 Processor Signaling System Memory Interface Signal GroupsPCI Express* Signals 3 DMI2/PCI Express* Signals Input Device Hysteresis Platform Environmental Control Interface PeciSystem Reference Clocks BCLK0/1DP, BCLK0/ 1DN Jtag and Test Access Port TAP Signals Processor Sideband SignalsPower, Ground and Sense Signals PLL Power Supply Power and Ground Lands Power Number Comments Ground LandsDecoupling Guidelines Voltage Identification VID Svid Commands SetVID Fast CommandSetVID Slow Command SetVID-Decay Command Svid Power State Functions SetPS VR Power-State Transitions Svid Voltage Rail Addressing Svid Address UsagePWM Address HEX Processor 159 Signal Group Summary Reserved or Unused SignalsSignal Description Buffer Types Sheet 1 Signal Description Signal Description Buffer Types Sheet 2 Signal Groups Sheet 1 Signal Groups Sheet 2 Signal Groups Sheet 3 Serial VID Interface Svid SignalsProcessor Asynchronous Sideband Signals Miscellaneous Signals Power-On Configuration POC Options Signals with On-Die TerminationPower-On Configuration Option Lands Signal Name Pull Up /Pull Rail Value Units Down Fault Resilient Booting FRB Fault Resilient Booting Output Tri-State SignalsOutput Tri-State Signal Groups Signals Mixing Processors Symbol Parameter Min Max Unit Flexible Motherboard Guidelines FMBAbsolute Maximum and Minimum Ratings Processor Absolute Minimum and Maximum Ratings Storage Conditions Specifications 10. Storage Condition Ratings DC Specifications Voltage and Current Specifications 11. Voltage SpecificationSymbol Parameter Voltage Min Typ Max Unit Plane VCC VID 12. Processor Current Specifications Parameter Symbol Processor TDP / Core CountMax a Definition Core/6-core 13 /6 Core Processor VCC Static and Transient Tolerance CC a ICC a VID 3,4,5,6 100 105 110 115 120 125 130 135 140 145 150 174 VCC Overshoot Specifications 15. VCC Overshoot Specifications Sheet 1Symbol Parameter Min Max Units Die Voltage Validation 16. DDR3 and DDR3L Signal DC Specifications Sheet 1 Signal DC Specifications15. VCC Overshoot Specifications Sheet 2 16. DDR3 and DDR3L Signal DC Specifications Sheet 2 Reference Clock SignalCommand Signals Control Signals 17. Peci DC Specifications 18. System Reference Clock BCLK0/1 DC Specifications19. SMBus DC Specifications Sheet 1 Symbol Definition and Conditions Min Max Units 19. SMBus DC Specifications Sheet 2 20. Jtag and TAP Signals DC Specifications21. Serial VID Interface Svid DC Specifications Sheet 1 Symbol Parameter Min Typ Max Units 21. Serial VID Interface Svid DC Specifications Sheet 2 22. Processor Asynchronous Sideband DC SpecificationsCMOS1.05v Signals Open Drain Cmos Odcmos Signals PCI Express* DC Specifications 3.2 DMI2/PCI Express* DC SpecificationsIntel QuickPath Interconnect DC Specifications Reset and Miscellaneous Signal DC Specifications Stable VRB-DifferentialVcross MAX = 550mV Vcross MIN = 250mV 2 I/O Signal Quality Specifications Signal Quality1 DDR3 Signal Quality Specifications Intel QuickPath Interconnect Signal Quality Specifications Input Reference Clock Signal Quality Specifications24. Processor I/O Overshoot/Undershoot Specifications Overshoot/Undershoot Tolerance Activity Factor Reading Overshoot/Undershoot Specification TablesOvershoot/Undershoot Pulse Duration 11. Maximum Acceptable Overshoot/Undershoot Waveform Listing by Land Name Land Name Sheet 1Land Name Sheet 2 Land Name Land No Buffer Type Direction Land Name Sheet 3 Land Name Sheet 4 Land Name Sheet 5 Land Name Sheet 6 Land Name Sheet 7 Land Name Sheet 8 Land Name Sheet 9 Land Name Sheet 10 Land Name Sheet 11 Land Name Sheet 12 Land Name Sheet 13 Land Name Sheet 14 Land Name Sheet 15 Land Name Sheet 16 Land Name Sheet 17 Land Name Sheet 18 Land Name Sheet 19 Land Name Sheet 20 Land Name Sheet 21 Land Name Sheet 22 Land Name Sheet 23 Land Name Sheet 24 Land Name Sheet 25 Land Name Sheet 26 Land Name Sheet 27 Land Name Sheet 28 Land Name Sheet 29 Land Name Sheet 30 Land Name Sheet 31 Land Name Sheet 32 Land Name Sheet 33 Land Name Sheet 34VCCD01 VCCD23 Land Name Sheet 35 Land Name Sheet 36 Land Name Sheet 37 Land Name Sheet 38 Land Name Sheet 39 Land Name Sheet 40 Land Name Sheet 41 Land Name Sheet 42 Land Name Sheet 43 Land Name Sheet 44 Land Name Sheet 45 Land Name Sheet 46 Land Name Sheet 47 Land Name Sheet 48Vtta Vttd Land Name Sheet 49 Listing by Land Number Land Number Sheet 1Land Number Sheet 2 Land No Land Name Buffer Type Direction Land Number Sheet 3 Land Number Sheet 4 Land Number Sheet 5 Land Number Sheet 6 Land Number Sheet 7 Land Number Sheet 8 Land Number Sheet 9 Land Number Sheet 10 Land Number Sheet 11 Land Number Sheet 12 Land Number Sheet 13 Land Number Sheet 14 Land Number Sheet 15 Land Number Sheet 16 Land Number Sheet 17 Land Number Sheet 18 Land Number Sheet 19 Land Number Sheet 20 Land Number Sheet 21 Land Number Sheet 22 Land Number Sheet 23 Land Number Sheet 24 Land Number Sheet 25 Land Number Sheet 26 Land Number Sheet 27 Land Number Sheet 28 Land Number Sheet 29 Land Number Sheet 30 Land Number Sheet 31 Land Number Sheet 32 Land Number Sheet 33 Land Number Sheet 34 Land Number Sheet 35 Land Number Sheet 36 Land Number Sheet 37 Land Number Sheet 38 Land Number Sheet 39 Land Number Sheet 40 Land Number Sheet 41 Land Number Sheet 42 Land Number Sheet 43 Land Number Sheet 44 Land Number Sheet 45 Land Number Sheet 46 Land Number Sheet 47 Land Number Sheet 48 236 Processor Package Assembly Sketch Package Mechanical Drawing 238 Processor Package Drawing Sheet 1 Processor Package Drawing Sheet 2 Package Loading Specifications Package Insertion SpecificationsProcessor Component Keep-Out Zones Package Handling Guidelines Processor Mass Specification Processor MaterialsProcessor Markings Processor Materials Boxed Processor Specifications Available Boxed Thermal Solution Configurations 244 Mechanical Specifications STS200P and STS200PNRW 25.5 mm Tall Passive Heat Sinks Motherboard Keepout Zones 1 246 Boxed Processor Specifications Motherboard Keepout Zones 2 Boxed Processor Motherboard Keepout Zones 3 248 Motherboard Keepout Zones 4 TOP Surface of Motherboard Boxed Processor Heat Sink Volumetric 1 250 Heat Sink Volumetric 2 SpecificationsProcessor Boxed Processor 10.4-Pin Fan Cable Connector For Active Heat Sink 11 -Pin Base Baseboard Fan Header For Active Heat Sink Fan Power Supply STS200C 21,000 25,000 28,000 Boxed Processor Cooling Requirements Boxed Processor Contents Boxed Processor 258