Figures

1-1

Intel® Xeon® Processor E5-2600 Product Family on the 2 Socket

 

 

Platform

14

1-2

PCI Express* Lane Partitioning and Direct Media Interface Gen 2 (DMI2)

17

2-1

PCI Express* Layering Diagram

26

2-2

Packet Flow through the Layers

27

2-3

Ping()

32

2-4

Ping() Example

32

2-5

GetDIB()

32

2-6

Device Info Field Definition

33

2-7

Revision Number Definition

33

2-8

GetTemp()

34

2-9

GetTemp() Example

35

2-10

RdPkgConfig()

36

2-11

WrPkgConfig()

37

2-12

DRAM Thermal Estimation Configuration Data

40

2-13

DRAM Rank Temperature Write Data

41

2-14

The Processor DIMM Temperature Read / Write

42

2-15

Ambient Temperature Reference Data

42

2-16

Processor DRAM Channel Temperature

43

2-17

Accumulated DRAM Energy Data

43

2-18

DRAM Power Info Read Data

44

2-19

DRAM Power Limit Data

45

2-20

DRAM Power Limit Performance Data

45

2-21

CPUID Data

49

2-22

Platform ID Data

49

2-23

PCU Device ID

49

2-24

Maximum Thread ID

50

2-25

Processor Microcode Revision

50

2-26

Machine Check Status

50

2-27

Package Power SKU Unit Data

50

2-28

Package Power SKU Data

52

2-29

Package Temperature Read Data

52

2-30

Temperature Target Read

53

2-31

Thermal Status Word

54

2-32

Thermal Averaging Constant Write / Read

54

2-33

Current Config Limit Read Data

55

2-34

Accumulated Energy Read Data

55

2-35

Power Limit Data for VCC Power Plane

56

2-36

Package Turbo Power Limit Data

57

2-37

Package Power Limit Performance Data

57

2-38

Efficient Performance Indicator Read

58

2-39

ACPI P-T Notify Data

58

2-40

Caching Agent TOR Read Data

59

2-41

DTS Thermal Margin Read

59

2-42

Processor ID Construction Example

61

2-43

RdIAMSR()

61

2-44

PCI Configuration Address

64

2-45

RdPCIConfig()

64

2-46

PCI Configuration Address for local accesses

66

6

Intel® Xeon® Processor E5-1600/ E5-2600/E5-4600 Product Families

 

Datasheet Volume One

Page 6
Image 6
Intel E5-2600, CM8062101038606, E5-4600, E5-1600 manual Figures