Power and Ground Signals Sheet 2 | Intel E5-1600, CM8062101038606

Signal Descriptions

Table 6-16. Power and Ground Signals (Sheet 2 of 2)

Signal Name

Description

		VTTD_SENSE and VSS_VTTD_SENSE provide an isolated, low
	VTTD_SENSE	impedance connection to the processor I/O power plane. These
	VTTD_SENSE	signals must be connected to the voltage regulator feedback
	VSS_VTTD_SENSE	circuit, which insures the output voltage (that is, processor
		voltage) remains within specification. Please see the applicable
		platform design guide for implementation details.

		Variable power supply for the processor system memory interface.
		Provided by two VRM/EVRD 12.0 compliant regulators per CPU
		socket. VCCD_01 and VCCD_23 are used for memory channels 0,
		1, 2, and 3 respectively. The valid voltage of this supply (1.50 V or
		1.35 V) is configured by BIOS after determining the operating
	VCCD_01 and VCCD_23	voltages of the installed memory. VCCD_01 and VCCD_23 will also
		be referred to as VCCD.
		Note: The processor must be provided VCCD_01 and VCCD_23
		for proper operation, even in configurations where no
		memory is populated. A VRM/EVRD 12.0 controller is
		recommended, but not required.

	VCCPLL	Fixed power supply (1.8V) for the processor phased lock loop
	VCCPLL	(PLL).
		(PLL).

		Variable power supply for the processor system agent units. These
		include logic (non-I/O) for the integrated I/O controller, the
		integrated memory controller (iMC), the Intel QPI agent, and the
	VSA	Power Control Unit (PCU). The output voltage of this supply is
		selected by the processor, using the serial voltage ID (SVID) bus.
		Note: VSA has a Vboot setting of 0.9V. Refer to the VR12/IMVP7
		Pulse Width Modulation Specification.

VSS

VTTA VTTD

Processor ground node.

Combined fixed analog and digital power supply for I/O sections of the processor Intel QPI interface, Direct Media Interface Gen 2 (DMI2) interface, and PCI Express* interface. These signals will also be referred to as VTT. Please see the appropriate Platform Design Guide (PDG)for implementation details.

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Intel® Xeon® Processor E5-1600/E5-2600/E5-4600 Product Families	151
Datasheet Volume One

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Intel E5-1600, CM8062101038606, E5-4600, E5-2600 manual Power and Ground Signals Sheet 2

Contents

May Datasheet Volume OnePage Contents Package Thermal Specifications Mechanical Specifications 245 10.2.1 Figures Tcase 8-Core 135W Thermal Profile 2U Tables Core 150W Thermal Profile, Workstation Platform SKU Only Fault Resilient Booting Output Tri-State Signals Initial Release March Revision Description Revision Date Number Datasheet Volume One Introduction Overview Processor Feature Details Supported Technologies InterfacesSystem Memory Support PCI Express NTB Intel QuickPath Interconnect Intel QPI Direct Media Interface Gen 2 DMI2Link System States Support Power Management SupportPlatform Environment Control Interface Peci Processor Package and Core States Intel QuickPath Interconnect Thermal Management SupportPackage Summary Terminology IOV IMCIIO IHS Nebs LLCLrdimm Nctf Udimm Related DocumentsTDP Tsod Referenced Documents Sheet 2 State of Data System Memory Technology Support System Memory InterfaceSystem Memory Timing Support PCI Express* Architecture PCI Express* Interface Physical Layer PCI Express* Configuration MechanismTransaction Layer Data Link Layer Processor/PCH Compatibility Assumptions 1 DMI2 Error FlowDMI2/PCI Express* Interface Intel QuickPath Interconnect Interfaces Peci Client Capabilities Summary of Processor-specific Peci CommandsCommand Supported on the Processor Platform Environment Control Interface Peci Platform Manageability Client Command SuiteProcessor Interface Tuning and Diagnostics Thermal Management GetDIB Minor Revision Number Meaning Minor Revision Supported Command SuiteDevice Info Revision Number Client Address Write Length Read Length GetTempTemp70 Temp158 Response Meaning RdPkgConfigSupported Responses GetTemp Response Definition RdPkgConfig Response Definition WrPkgConfig Electrical error or AW FCS failure WrPkgConfig Response Definition Sheet 1 WrPkgConfig Response Definition Sheet 2 Package Configuration CapabilitiesDram Thermal and Power Optimization Capabilities Dram Rank TemperatureDram Power By power Performance Dram Thermal Estimation Configuration Data Read/WriteLimit Data Limit Index Encoding Physical Channel# Physical DIMM# Dram Rank Temperature WriteDimm Temperature Read Channel & Dimm Index Decoding Dram Channel Temperature Read Dimm Ambient Temperature Write / ReadDIMM# Accumulated Dram Energy Read Dram Power Info ReadAccumulated Dram Energy Data Maximum Time Dram Power Limit Data Write / ReadTypical Value Dram Powerlimit Dram Power Limit Performance Status ReadReserved CSR Mcaerrsrclog CPU Thermal and Power Optimization CapabilitiesCpuid CSR did Read status Read Mode bit AccumulatedPower Limit for VCC Power Limits For Read Package PowerModes Package Power Indicator Read Flag Package Identifier ReadProcessor Type Max Thread Package Power SKU Unit Read Package Power SKU Read Power Control Register Unit CalculationsUnit Field Value Calculation Default Value Peci Temperature Wake on Peci Mode Bit Write / ReadPackage Temperature Read Maximum Package Power Window Temperature Target Read Per Core DTS Temperature ReadPackage Thermal Status Read / Clear 4 3 2 1 Thermal Averaging Constant Write / ReadThermally Constrained Time Read Current Limit Read Accumulated Energy Status Read Power Limit for the VCC Power Plane Write / Read Control Time Clamp Power Limit Package Power Limits For Multiple Turbo ModesMode Enable Window #2 Mode #2 Enable #2 Package Power Limit Performance Status Read Acpi P-T Notify Write & Read Efficient Performance Indicator Read Thermal Margin Read Read Mode bit 11 = ‘0’Core ID Bit Read Mode bit 11 = ‘1’ Caching Agent TOR Read Processor ID Enumeration RdIAMSR 42. Processor ID Construction Example 10. RdIAMSR Response Definition 11. RdIAMSR Services Summary Sheet 1RdIAMSR Capabilities Or ID Address Meaning Sor ID Byte Dword 11. RdIAMSR Services Summary Sheet 2 44. PCI Configuration Address RdPCIConfig Appropriate RdPCIConfigLocal12. RdPCIConfig Response Definition Timely fashion. Retry is appropriate PCI Configuration Address 13. RdPCIConfigLocal Response Definition Sheet 10x05 0x02,0x03,0x05 0xe1 Definition 13. RdPCIConfigLocal Response Definition Sheet 2 WrPCIConfigLocal Completion 14. WrPCIConfigLocal Response DefinitionCmd Code 0xe5 Client Management Power-up SequencingWrPCIConfigLocal Capabilities 16. Peci Client Response During Power-Up Sheet 1 Device Discovery 16. Peci Client Response During Power-Up Sheet 2Client Addressing 17. Socket ID Strapping 18. Power Impact of Peci Commands vs. C-statesCommand Power Impact States System Service Processor SSP Mode Support Processor ResetBMC Init Mode Originator Retry and Timeout Policy Processor Error HandlingLink Init Mode 19. Domain ID Definition Multi-Domain Commands20. Multi-Domain Command Code Reference Enumerating Peci Client Capabilities 21. Completion Code Pass/Fail Mask Client ResponsesAbort FCS Completion Codes Interpretation DTS Temperature DataOriginator Responses Format Reserved Values Temperature Filtering24. Error Codes and Descriptions Error Code Description Datasheet Volume One Intel VT-x Objectives Intel Virtualization Technology Intel VT Intel VT-d Features Supported Intel VT-x FeaturesIntel VT-d Objectives Intel Virtualization Technology Processor Extensions Security TechnologiesIntel Trusted Execution Technology Intel Advanced Encryption Standard Instructions Intel AES-NI Intel Trusted Execution Technology Server Extensions Intel Turbo Boost Operating Frequency Execute Disable Bit Enhanced Intel SpeedStep Technology Intel Intelligent Power TechnologyIntel Advanced Vector Extensions Intel AVX Intel Dynamic Power Technology Intel DPT Technologies Package C-State Support Sheet 1 Acpi States SupportedSystem States System States Core C-State Support System Memory Power States Sheet 1Integrated Memory Controller States Package C-State Support Sheet 2 Intel QuickPath Interconnect States 4 DMI2/PCI Express Link States6 G, S, and C State Combinations Low-Power Idle States Processor Core/Package Power ManagementEnhanced Intel SpeedStep Technology Idle Power Management Breakdown of the Processor Cores Requesting Low-Power Idle States PLVLx to Mwait Conversion Core C-statesCore C0 State Core C1/C1E State State Auto-Demotion Core C3 StateCore C6 State Core C7 State Package C-States Package C-State Core Coordination of Core Power States at the Package LevelPackage C0 Package C1/C1E Package C3 State Package C2 StatePackage C6 State TDP SKUs C1E W C3 W C6 W Core / 6-Core System Memory Power ManagementPackage C-State Power Specifications 10. Package C-State Power Specifications Self Refresh Exit CKE Power-DownSelf Refresh Self Refresh Entry Dram I/O Power Management DMI2/PCI Express* Power ManagementDLL and PLL Shutdown 100 Thermal Specifications Package Thermal Specifications Tcase and DTS Based Thermal Specifications Temperaturetarget MSR Processor Thermal Profiles 3.1 8-Core 150W Thermal SpecificationsProcessor SKU Summary Table Thermal Management Specifications Core 150W Thermal Profile, Workstation Platform SKU Only Power W Maximum T Case C Maximum Dtsc Tcase 8-Core 135W Thermal Specifications 2U 3.2 8-Core 135W Thermal Specifications3, 4 Core 135W Thermal Profile U Sheet 1 Power W Maximum Tcase C Maximum DTS C Power W Maximum T Case C Maximum DTS C 3.3 8/6-Core 130W Thermal SpecificationsCore 135W Thermal Profile U Sheet 2 Tcase 8/6-Core 130W Thermal Profile 1U 6-Core 130W Thermal Profile U Sheet 1 Power W Maximum Tcase C Maximum DTS C Core 6-Core 130W Thermal Profile U Sheet 2 3.4 6-Core 130W 1S WS Thermal SpecificationsTcase 6-Core 130W 1S WS Thermal Specifications Power W Maximum T Case C Maximum DTS C Core Core 130W 1S WS Thermal Profile Table Sheet 1 DTS 6-Core 130W 1S WS Thermal Profile 10. Tcase 8-Core 115W Thermal Specifications 1U 3.5 8-Core 115W Thermal SpecificationsCore 130W 1S WS Thermal Profile Table Sheet 2 10. Tcase 8-Core 115W Thermal Profile 1U 11 -Core 115W Thermal Profile U 3.6 8/6-Core 95W Thermal Specifications 12. Tcase 8/6-Core 95W Thermal Profile 1U 13 /6-Core 95W Thermal Profile U Sheet 1 14. DTS 6-Core 95W Thermal Profile 1U 14. Tcase 8-Core 70W Thermal Specifications 1U 3.7 8-Core 70W Thermal Specifications13 /6-Core 95W Thermal Profile U Sheet 2 15 -Core 70W Thermal Profile U 16. DTS 8-Core 70W Thermal Profile 1U 16. Tcase 6-Core 60W Thermal Specifications 1U 3.8 6-Core 60W Thermal Specifications 17 -Core 60W Thermal Profile U 18. DTS 6-Core 60W Thermal Profile 1U 18. Tcase 4-Core 130W Thermal Specifications 2U 3.9 4-Core 130W Thermal Specifications 19 -Core 130W Thermal Profile U Sheet 1 20. DTS 4-Core 130W Thermal Profile 2U 19 -Core 130W Thermal Profile U Sheet 2 3.10 4-Core 130W 1S WS Thermal Specifications 21. Tcase 4-Core 130W 1S WS Thermal Profile 22. Tcase 4-Core 95W Thermal Specifications 1U 3.11 4-Core 95W Thermal Specifications21 -Core 130W 1S WS Thermal Profile Table 23. Tcase 4-Core 95W Thermal Profile 1U 24. Tcase 4/2-Core 80W Thermal Specifications 1U 3.12 4/2-Core 80W Thermal Specifications23 -Core 95W Thermal Profile U 25. Tcase 4/2-Core 80W Thermal Profile 1U 25 /2-Core 80W Thermal Profile U Sheet 1 Maximum Tcase Maximum DTS C Power W Core 25 /2-Core 80W Thermal Profile U Sheet 2 4.1 8-Core LV95W Thermal SpecificationsMaximum T Case Maximum DTS C Power W Core Embedded Server Processor Thermal Profiles 28. Tcase 8-Core LV95W Thermal Profile, Embedded Server SKU 29. DTS 8-Core LV95W Thermal Profile, Embedded Server SKU 30. Tcase 8-Core LV70W Thermal Profile, Embedded Server SKU 4.2 8-Core LV70W Thermal Specifications 31. DTS 8-Core LV70W Thermal Profile, Embedded Server SKU Thermal Metrology 32. Case Temperature Tcase Measurement Location Processor Temperature Processor Core Thermal FeaturesAdaptive Thermal Monitor 33. Frequency and Voltage Ordering Frequency/SVID Control Prochotn Signal On-Demand ModeClock Modulation Integrated Memory Controller IMC Thermal Features Thermtripn SignalDram Throttling Options Hybrid Closed Loop Thermal Throttling CLTTHybrid MEMHOTC01N and MEMHOTC23N SignalIntegrated Dual SMBus Master Controllers for SMI Signal Name Description System Memory Interface SignalsMemory Channel DDR0, DDR1, DDR2, DDR3 Memory Channel Miscellaneous PCI Express* Based Interface SignalsPCI Express* Port 1 Signals PCI Express* Port 2 Signals Sheet 1 PCI Express* Port 3 Signals PCI Express* Port 2 Signals Sheet 2PCI Express* Miscellaneous Signals Sheet 1 Intel QuickPath Interconnect Signals DMI2/PCI Express* Port 0 Signals System Reference Clock Signals Peci SignalJtag and TAP Signals 14. Processor Asynchronous Sideband Signals Sheet 1 Serial VID Interface Svid SignalsProcessor Asynchronous Sideband and Miscellaneous Signals 13. Svid Signals 14. Processor Asynchronous Sideband Signals Sheet 2 16. Power and Ground Signals Sheet 1 Processor Power and Ground Supplies14. Processor Asynchronous Sideband Signals Sheet 3 15. Miscellaneous Signals 16. Power and Ground Signals Sheet 2 152 3 DMI2/PCI Express* Signals Processor SignalingSystem Memory Interface Signal Groups PCI Express* Signals System Reference Clocks BCLK0/1DP, BCLK0/ 1DN Platform Environmental Control Interface PeciInput Device Hysteresis PLL Power Supply Jtag and Test Access Port TAP SignalsProcessor Sideband Signals Power, Ground and Sense Signals Voltage Identification VID Power and Ground LandsPower Number Comments Ground Lands Decoupling Guidelines SetVID-Decay Command Svid CommandsSetVID Fast Command SetVID Slow Command VR Power-State Transitions Svid Power State Functions SetPS 159 Svid Voltage Rail AddressingSvid Address Usage PWM Address HEX Processor Signal Description Signal Group SummaryReserved or Unused Signals Signal Description Buffer Types Sheet 1 Signal Groups Sheet 1 Signal Description Buffer Types Sheet 2 Signal Groups Sheet 2 Miscellaneous Signals Signal Groups Sheet 3Serial VID Interface Svid Signals Processor Asynchronous Sideband Signals Signal Name Pull Up /Pull Rail Value Units Down Power-On Configuration POC OptionsSignals with On-Die Termination Power-On Configuration Option Lands Mixing Processors Fault Resilient Booting FRBFault Resilient Booting Output Tri-State Signals Output Tri-State Signal Groups Signals Processor Absolute Minimum and Maximum Ratings Symbol Parameter Min Max UnitFlexible Motherboard Guidelines FMB Absolute Maximum and Minimum Ratings 10. Storage Condition Ratings Storage Conditions Specifications DC Specifications VCC VID Voltage and Current Specifications11. Voltage Specification Symbol Parameter Voltage Min Typ Max Unit Plane Core/6-core 12. Processor Current SpecificationsParameter Symbol Processor TDP / Core Count Max a Definition CC a 13 /6 Core Processor VCC Static and Transient Tolerance ICC a VID 3,4,5,6 100 105 110 115 120 125 130 135 140 145 150 174 Die Voltage Validation VCC Overshoot Specifications15. VCC Overshoot Specifications Sheet 1 Symbol Parameter Min Max Units 15. VCC Overshoot Specifications Sheet 2 Signal DC Specifications16. DDR3 and DDR3L Signal DC Specifications Sheet 1 Control Signals 16. DDR3 and DDR3L Signal DC Specifications Sheet 2Reference Clock Signal Command Signals Symbol Definition and Conditions Min Max Units 17. Peci DC Specifications18. System Reference Clock BCLK0/1 DC Specifications 19. SMBus DC Specifications Sheet 1 Symbol Parameter Min Typ Max Units 19. SMBus DC Specifications Sheet 220. Jtag and TAP Signals DC Specifications 21. Serial VID Interface Svid DC Specifications Sheet 1 Open Drain Cmos Odcmos Signals 21. Serial VID Interface Svid DC Specifications Sheet 222. Processor Asynchronous Sideband DC Specifications CMOS1.05v Signals Reset and Miscellaneous Signal DC Specifications PCI Express* DC Specifications3.2 DMI2/PCI Express* DC Specifications Intel QuickPath Interconnect DC Specifications Vcross MIN = 250mV StableVRB-Differential Vcross MAX = 550mV 1 DDR3 Signal Quality Specifications Signal Quality2 I/O Signal Quality Specifications Overshoot/Undershoot Tolerance Intel QuickPath Interconnect Signal Quality SpecificationsInput Reference Clock Signal Quality Specifications 24. Processor I/O Overshoot/Undershoot Specifications Overshoot/Undershoot Pulse Duration Reading Overshoot/Undershoot Specification TablesActivity Factor 11. Maximum Acceptable Overshoot/Undershoot Waveform Land Name Land No Buffer Type Direction Listing by Land NameLand Name Sheet 1 Land Name Sheet 2 Land Name Sheet 4 Land Name Sheet 3 Land Name Sheet 6 Land Name Sheet 5 Land Name Sheet 8 Land Name Sheet 7 Land Name Sheet 10 Land Name Sheet 9 Land Name Sheet 12 Land Name Sheet 11 Land Name Sheet 14 Land Name Sheet 13 Land Name Sheet 16 Land Name Sheet 15 Land Name Sheet 18 Land Name Sheet 17 Land Name Sheet 20 Land Name Sheet 19 Land Name Sheet 22 Land Name Sheet 21 Land Name Sheet 24 Land Name Sheet 23 Land Name Sheet 26 Land Name Sheet 25 Land Name Sheet 28 Land Name Sheet 27 Land Name Sheet 30 Land Name Sheet 29 Land Name Sheet 32 Land Name Sheet 31 VCCD23 Land Name Sheet 33Land Name Sheet 34 VCCD01 Land Name Sheet 36 Land Name Sheet 35 Land Name Sheet 38 Land Name Sheet 37 Land Name Sheet 40 Land Name Sheet 39 Land Name Sheet 42 Land Name Sheet 41 Land Name Sheet 44 Land Name Sheet 43 Land Name Sheet 46 Land Name Sheet 45 Vttd Land Name Sheet 47Land Name Sheet 48 Vtta Land Name Sheet 49 Land No Land Name Buffer Type Direction Listing by Land NumberLand Number Sheet 1 Land Number Sheet 2 Land Number Sheet 4 Land Number Sheet 3 Land Number Sheet 6 Land Number Sheet 5 Land Number Sheet 8 Land Number Sheet 7 Land Number Sheet 10 Land Number Sheet 9 Land Number Sheet 12 Land Number Sheet 11 Land Number Sheet 14 Land Number Sheet 13 Land Number Sheet 16 Land Number Sheet 15 Land Number Sheet 18 Land Number Sheet 17 Land Number Sheet 20 Land Number Sheet 19 Land Number Sheet 22 Land Number Sheet 21 Land Number Sheet 24 Land Number Sheet 23 Land Number Sheet 26 Land Number Sheet 25 Land Number Sheet 28 Land Number Sheet 27 Land Number Sheet 30 Land Number Sheet 29 Land Number Sheet 32 Land Number Sheet 31 Land Number Sheet 34 Land Number Sheet 33 Land Number Sheet 36 Land Number Sheet 35 Land Number Sheet 38 Land Number Sheet 37 Land Number Sheet 40 Land Number Sheet 39 Land Number Sheet 42 Land Number Sheet 41 Land Number Sheet 44 Land Number Sheet 43 Land Number Sheet 46 Land Number Sheet 45 Land Number Sheet 48 Land Number Sheet 47 236 Package Mechanical Drawing Processor Package Assembly Sketch 238 Processor Package Drawing Sheet 1 Processor Package Drawing Sheet 2 Package Handling Guidelines Package Loading SpecificationsPackage Insertion Specifications Processor Component Keep-Out Zones Processor Materials Processor Mass SpecificationProcessor Materials Processor Markings Available Boxed Thermal Solution Configurations Boxed Processor Specifications 244 STS200P and STS200PNRW 25.5 mm Tall Passive Heat Sinks Mechanical Specifications 246 Motherboard Keepout Zones 1 Motherboard Keepout Zones 2 Boxed Processor Specifications 248 Boxed Processor Motherboard Keepout Zones 3 TOP Surface of Motherboard Motherboard Keepout Zones 4 250 Boxed Processor Heat Sink Volumetric 1 Boxed Processor Heat Sink Volumetric 2Specifications Processor 10.4-Pin Fan Cable Connector For Active Heat Sink 11 -Pin Base Baseboard Fan Header For Active Heat Sink 21,000 25,000 28,000 Fan Power Supply STS200C Boxed Processor Cooling Requirements Boxed Processor Contents Boxed Processor 258