Table 2-16. PECI Client Response During Power-Up (Sheet 2 of 2)

Command

Response During

Response During

‘Data Not Ready’

‘Available Except Core Services’

 

 

 

 

RdPCIConfigLocal()

Client responds with a timeout completion

Fully functional

 

code of 0x81

 

 

 

 

WrPCIConfigLocal()

Client responds with a timeout completion

Fully functional

 

code of 0x81

 

 

 

 

RdPCIConfig()

Client responds with a timeout completion

Fully functional

 

code of 0x81

 

 

 

 

In the event that the processor is tri-stated using power-on-configuration controls, the PECI client will also be tri-stated. Processor tri-state controls are described in Section 7.3, “Power-On Configuration (POC) Options”.

Figure 2-49. The Processor PECI Power-up Timeline()

PWRGOOD

 

 

 

 

 

RESET_N

 

 

 

 

 

Core execution

In Reset

 

idle

running

 

Reset uCode

Boot BIOS

PECI Client

In Reset

Data Not Ready

Available except core

Fully Operational

Status

services

 

 

 

 

SOCKET_ID[1:0]

X

 

SOCKET ID Valid

 

2.5.3.2Device Discovery

The PECI client is available on all processors. The presence of a PECI enabled processor in a CPU socket can be confirmed by using the Ping() command described in Section 2.5.2.1. Positive identification of the PECI revision number can be achieved by issuing the GetDIB() command. The revision number acts as a reference to the PECI specification document applicable to the processor client definition. Please refer to Section 2.5.2.2 for details on GetDIB response formatting.

2.5.3.3Client Addressing

The PECI client assumes a default address of 0x30. The PECI client address for the processor is configured through the settings of the SOCKET_ID[1:0] signals. Each processor socket in the system requires that the two SOCKET_ID signals be configured to a different PECI addresses. Strapping the SOCKET_ID[1:0] pins results in the client addresses shown in Table 2-17. These package strap(s) are evaluated at the assertion of PWRGOOD (as depicted in Figure 2-49). Refer to the appropriate Platform Design Guide (PDG) for recommended resistor values for establishing non-default SOCKET_ID settings.

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Intel® Xeon® Processor E5-1600/E5-2600/E5-4600 Product Families

 

Datasheet Volume One

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Intel E5-2600, CM8062101038606, E5-4600 Device Discovery, Client Addressing, Peci Client Response During Power-Up Sheet 2