Intel E5-4600, CM8062101038606, E5-2600, E5-1600 specs

Electrical Specifications

Table 7-14. 4/2-Core: Processor VCC Static and Transient Tolerance (Sheet 2 of 2)

ICC (A)	VCC_MAX (V)	VCC_TYP (V)	VCC_MIN (V)	Notes
60	VID - 0.033	VID - 0.048	VID - 0.063	1,2,3,4,5,6

65	VID - 0.037	VID - 0.052	VID - 0.067	1,2,3,4,5,6

70	VID - 0.041	VID - 0.056	VID - 0.071	1,2,3,4,5,6

75	VID - 0.045	VID - 0.060	VID - 0.075	1,2,3,4,5,6

80	VID - 0.049	VID - 0.064	VID - 0.079	1,2,3,4,5,6

85	VID - 0.053	VID - 0.068	VID - 0.083	1,2,3,4,5,6

90	VID - 0.057	VID - 0.072	VID - 0.087	1,2,3,4,5,6

95	VID - 0.061	VID - 0.076	VID - 0.091	1,2,3,4,5,6

100	VID - 0.065	VID - 0.080	VID - 0.095	1,2,3,4,5,6

105	VID - 0.069	VID - 0.084	VID - 0.099	1,2,3,4,5,6

110	VID - 0.073	VID - 0.088	VID - 0.103	1,2,3,4,5,6

115	VID - 0.077	VID - 0.092	VID - 0.107	1,2,3,4,5,6

120	VID - 0.081	VID - 0.096	VID - 0.111	1,2,3,4,5,6

125	VID - 0.085	VID - 0.100	VID - 0.115	1,2,3,4,5,6

130	VID - 0.089	VID - 0.104	VID - 0.119	1,2,3,4,5,6

135	VID - 0.093	VID - 0.108	VID - 0.123	1,2,3,4,5,6

140	VID - 0.097	VID - 0.112	VID - 0.127	1,2,3,4,5,6

145	VID - 0.101	VID - 0.116	VID - 0.131	1,2,3,4,5,6

150	VID - 0.105	VID - 0.120	VID - 0.135	1,2,3,4,5,6

Notes:

1.The loadline specification includes both static and transient limits.

2.This table is intended to aid in reading discrete points on graph in Figure 7-4.

3.The loadlines specify voltage limits at the die measured at the Vcc_sense and Vss_Vcc_sense lands. Voltage regulation feedback for voltage regulator circuits must also be taken from processor Vcc_sense and Vss_Vcc_sense lands. Refer to the VR12/IMVP7 Pulse Width Modulation Specification for loadline guidelines and VR implementation details.

4.The Vcc_min and Vcc_max loadlines represent static and transient limits. Please see Section 7.8.2.1, “VCC Overshoot Specifications”.

5.The Adaptive Loadline Positioning slope is 0.8 mΩ.

6.The 4/2-core Icc ranges are as follows:

•0-150 A for 130 W processor

•0-135 A for 95 W processor

•0-100 A for 80 W processor

Intel® Xeon® Processor E5-1600/E5-2600/E5-4600 Product Families	173
Datasheet Volume One

Image 173

Intel E5-4600, CM8062101038606, E5-2600, E5-1600 manual VID 3,4,5,6 100 105 110 115 120 125 130 135 140 145 150

Contents

May Datasheet Volume OnePage Contents Package Thermal Specifications Mechanical Specifications 245 10.2.1 Figures Tcase 8-Core 135W Thermal Profile 2U Tables Core 150W Thermal Profile, Workstation Platform SKU Only Fault Resilient Booting Output Tri-State Signals Initial Release March Revision Description Revision Date Number Datasheet Volume One Introduction Overview Processor Feature Details System Memory Support InterfacesSupported Technologies PCI Express NTB Link Direct Media Interface Gen 2 DMI2Intel QuickPath Interconnect Intel QPI Platform Environment Control Interface Peci Power Management SupportProcessor Package and Core States System States Support Package Summary Thermal Management SupportTerminology Intel QuickPath Interconnect IIO IMCIHS IOV Lrdimm LLCNctf Nebs TDP Related DocumentsTsod Udimm Referenced Documents Sheet 2 State of Data System Memory Timing Support System Memory InterfaceSystem Memory Technology Support PCI Express* Architecture PCI Express* Interface Transaction Layer PCI Express* Configuration MechanismData Link Layer Physical Layer DMI2/PCI Express* Interface 1 DMI2 Error FlowIntel QuickPath Interconnect Processor/PCH Compatibility Assumptions Interfaces Command Supported on the Processor Summary of Processor-specific Peci CommandsPlatform Environment Control Interface Peci Peci Client Capabilities Processor Interface Tuning and Diagnostics Client Command SuiteThermal Management Platform Manageability GetDIB Device Info Minor Revision Supported Command SuiteRevision Number Minor Revision Number Meaning Temp70 Temp158 GetTempClient Address Write Length Read Length Supported Responses RdPkgConfigGetTemp Response Definition Response Meaning RdPkgConfig Response Definition WrPkgConfig Electrical error or AW FCS failure WrPkgConfig Response Definition Sheet 1 Dram Thermal and Power Optimization Capabilities Package Configuration CapabilitiesWrPkgConfig Response Definition Sheet 2 Dram Power TemperatureBy power Dram Rank Limit Data Dram Thermal Estimation Configuration Data Read/WriteLimit Performance Dimm Temperature Read Dram Rank Temperature WriteChannel & Dimm Index Decoding Index Encoding Physical Channel# Physical DIMM# DIMM# Dimm Ambient Temperature Write / ReadDram Channel Temperature Read Accumulated Dram Energy Data Dram Power Info ReadAccumulated Dram Energy Read Typical Value Dram Power Limit Data Write / ReadMaximum Time Reserved Dram Power Limit Performance Status ReadDram Powerlimit Cpuid CPU Thermal and Power Optimization CapabilitiesCSR did CSR Mcaerrsrclog Power Limit for Read Mode bit AccumulatedVCC Power Read status Modes Package Power Read Package PowerIndicator Read Limits For Processor Package Identifier ReadType Flag Max Thread Package Power SKU Unit Read Unit Field Value Calculation Default Value Power Control Register Unit CalculationsPackage Power SKU Read Package Temperature Read Wake on Peci Mode Bit Write / ReadMaximum Package Power Window Peci Temperature Package Thermal Status Read / Clear Per Core DTS Temperature ReadTemperature Target Read Thermally Constrained Time Read Thermal Averaging Constant Write / ReadCurrent Limit Read 4 3 2 1 Accumulated Energy Status Read Power Limit for the VCC Power Plane Write / Read Mode Enable Package Power Limits For Multiple Turbo ModesControl Time Clamp Power Limit Window #2 Mode #2 Enable #2 Package Power Limit Performance Status Read Acpi P-T Notify Write & Read Efficient Performance Indicator Read Core ID Bit Read Mode bit 11 = ‘1’ Read Mode bit 11 = ‘0’Caching Agent TOR Read Thermal Margin Read Processor ID Enumeration RdIAMSR 42. Processor ID Construction Example RdIAMSR Capabilities 11. RdIAMSR Services Summary Sheet 110. RdIAMSR Response Definition Or ID Address Meaning Sor ID Byte Dword 11. RdIAMSR Services Summary Sheet 2 44. PCI Configuration Address RdPCIConfig 12. RdPCIConfig Response Definition RdPCIConfigLocalTimely fashion. Retry is appropriate Appropriate 0x05 0x02,0x03,0x05 0xe1 Definition 13. RdPCIConfigLocal Response Definition Sheet 1PCI Configuration Address 13. RdPCIConfigLocal Response Definition Sheet 2 WrPCIConfigLocal Cmd Code 14. WrPCIConfigLocal Response Definition0xe5 Completion WrPCIConfigLocal Capabilities Power-up Sequencing16. Peci Client Response During Power-Up Sheet 1 Client Management Client Addressing 16. Peci Client Response During Power-Up Sheet 2Device Discovery Command Power Impact 18. Power Impact of Peci Commands vs. C-statesStates 17. Socket ID Strapping BMC Init Mode Processor ResetSystem Service Processor SSP Mode Support Link Init Mode Processor Error HandlingOriginator Retry and Timeout Policy 20. Multi-Domain Command Code Reference Multi-Domain CommandsEnumerating Peci Client Capabilities 19. Domain ID Definition Abort FCS Client ResponsesCompletion Codes 21. Completion Code Pass/Fail Mask Originator Responses DTS Temperature DataFormat Interpretation 24. Error Codes and Descriptions Temperature FilteringError Code Description Reserved Values Datasheet Volume One Intel VT-x Objectives Intel Virtualization Technology Intel VT Intel VT-d Objectives Intel VT-x FeaturesIntel VT-d Features Supported Intel Trusted Execution Technology Security TechnologiesIntel Virtualization Technology Processor Extensions Intel Advanced Encryption Standard Instructions Intel AES-NI Intel Trusted Execution Technology Server Extensions Intel Turbo Boost Operating Frequency Execute Disable Bit Intel Advanced Vector Extensions Intel AVX Intel Intelligent Power TechnologyEnhanced Intel SpeedStep Technology Intel Dynamic Power Technology Intel DPT Technologies System States Acpi States SupportedSystem States Package C-State Support Sheet 1 Integrated Memory Controller States System Memory Power States Sheet 1Package C-State Support Sheet 2 Core C-State Support 6 G, S, and C State Combinations 4 DMI2/PCI Express Link StatesIntel QuickPath Interconnect States Enhanced Intel SpeedStep Technology Processor Core/Package Power ManagementLow-Power Idle States Idle Power Management Breakdown of the Processor Cores Requesting Low-Power Idle States Core C0 State Core C-statesCore C1/C1E State PLVLx to Mwait Conversion Core C6 State Core C3 StateCore C7 State State Auto-Demotion Package C-States Package C0 Coordination of Core Power States at the Package LevelPackage C1/C1E Package C-State Core Package C6 State Package C2 StatePackage C3 State Package C-State Power Specifications System Memory Power Management10. Package C-State Power Specifications TDP SKUs C1E W C3 W C6 W Core / 6-Core Self Refresh CKE Power-DownSelf Refresh Entry Self Refresh Exit DLL and PLL Shutdown DMI2/PCI Express* Power ManagementDram I/O Power Management 100 Thermal Specifications Package Thermal Specifications Tcase and DTS Based Thermal Specifications Temperaturetarget MSR Processor SKU Summary Table 3.1 8-Core 150W Thermal SpecificationsProcessor Thermal Profiles Thermal Management Specifications Core 150W Thermal Profile, Workstation Platform SKU Only Power W Maximum T Case C Maximum Dtsc 3, 4 3.2 8-Core 135W Thermal SpecificationsTcase 8-Core 135W Thermal Specifications 2U Core 135W Thermal Profile U Sheet 1 Power W Maximum Tcase C Maximum DTS C Core 135W Thermal Profile U Sheet 2 3.3 8/6-Core 130W Thermal SpecificationsPower W Maximum T Case C Maximum DTS C Tcase 8/6-Core 130W Thermal Profile 1U 6-Core 130W Thermal Profile U Sheet 1 Power W Maximum Tcase C Maximum DTS C Core Tcase 6-Core 130W 1S WS Thermal Specifications 3.4 6-Core 130W 1S WS Thermal SpecificationsPower W Maximum T Case C Maximum DTS C Core 6-Core 130W Thermal Profile U Sheet 2 Core 130W 1S WS Thermal Profile Table Sheet 1 DTS 6-Core 130W 1S WS Thermal Profile Core 130W 1S WS Thermal Profile Table Sheet 2 3.5 8-Core 115W Thermal Specifications10. Tcase 8-Core 115W Thermal Specifications 1U 10. Tcase 8-Core 115W Thermal Profile 1U 11 -Core 115W Thermal Profile U 3.6 8/6-Core 95W Thermal Specifications 12. Tcase 8/6-Core 95W Thermal Profile 1U 13 /6-Core 95W Thermal Profile U Sheet 1 14. DTS 6-Core 95W Thermal Profile 1U 13 /6-Core 95W Thermal Profile U Sheet 2 3.7 8-Core 70W Thermal Specifications14. Tcase 8-Core 70W Thermal Specifications 1U 15 -Core 70W Thermal Profile U 16. DTS 8-Core 70W Thermal Profile 1U 16. Tcase 6-Core 60W Thermal Specifications 1U 3.8 6-Core 60W Thermal Specifications 17 -Core 60W Thermal Profile U 18. DTS 6-Core 60W Thermal Profile 1U 18. Tcase 4-Core 130W Thermal Specifications 2U 3.9 4-Core 130W Thermal Specifications 19 -Core 130W Thermal Profile U Sheet 1 20. DTS 4-Core 130W Thermal Profile 2U 19 -Core 130W Thermal Profile U Sheet 2 3.10 4-Core 130W 1S WS Thermal Specifications 21. Tcase 4-Core 130W 1S WS Thermal Profile 21 -Core 130W 1S WS Thermal Profile Table 3.11 4-Core 95W Thermal Specifications22. Tcase 4-Core 95W Thermal Specifications 1U 23. Tcase 4-Core 95W Thermal Profile 1U 23 -Core 95W Thermal Profile U 3.12 4/2-Core 80W Thermal Specifications24. Tcase 4/2-Core 80W Thermal Specifications 1U 25. Tcase 4/2-Core 80W Thermal Profile 1U 25 /2-Core 80W Thermal Profile U Sheet 1 Maximum Tcase Maximum DTS C Power W Core Maximum T Case Maximum DTS C Power W Core 4.1 8-Core LV95W Thermal SpecificationsEmbedded Server Processor Thermal Profiles 25 /2-Core 80W Thermal Profile U Sheet 2 28. Tcase 8-Core LV95W Thermal Profile, Embedded Server SKU 29. DTS 8-Core LV95W Thermal Profile, Embedded Server SKU 30. Tcase 8-Core LV70W Thermal Profile, Embedded Server SKU 4.2 8-Core LV70W Thermal Specifications 31. DTS 8-Core LV70W Thermal Profile, Embedded Server SKU Thermal Metrology 32. Case Temperature Tcase Measurement Location Adaptive Thermal Monitor Processor Core Thermal FeaturesProcessor Temperature 33. Frequency and Voltage Ordering Frequency/SVID Control Clock Modulation On-Demand ModeProchotn Signal Dram Throttling Options Thermtripn SignalIntegrated Memory Controller IMC Thermal Features Integrated Dual SMBus Master Controllers for SMI MEMHOTC01N and MEMHOTC23N SignalHybrid Closed Loop Thermal Throttling CLTTHybrid Memory Channel DDR0, DDR1, DDR2, DDR3 System Memory Interface SignalsSignal Name Description PCI Express* Port 1 Signals PCI Express* Based Interface SignalsPCI Express* Port 2 Signals Sheet 1 Memory Channel Miscellaneous PCI Express* Miscellaneous Signals Sheet 1 PCI Express* Port 2 Signals Sheet 2PCI Express* Port 3 Signals Intel QuickPath Interconnect Signals DMI2/PCI Express* Port 0 Signals Jtag and TAP Signals Peci SignalSystem Reference Clock Signals Processor Asynchronous Sideband and Miscellaneous Signals Serial VID Interface Svid Signals13. Svid Signals 14. Processor Asynchronous Sideband Signals Sheet 1 14. Processor Asynchronous Sideband Signals Sheet 2 14. Processor Asynchronous Sideband Signals Sheet 3 Processor Power and Ground Supplies15. Miscellaneous Signals 16. Power and Ground Signals Sheet 1 16. Power and Ground Signals Sheet 2 152 System Memory Interface Signal Groups Processor SignalingPCI Express* Signals 3 DMI2/PCI Express* Signals Input Device Hysteresis Platform Environmental Control Interface PeciSystem Reference Clocks BCLK0/1DP, BCLK0/ 1DN Processor Sideband Signals Jtag and Test Access Port TAP SignalsPower, Ground and Sense Signals PLL Power Supply Power Number Comments Ground Lands Power and Ground LandsDecoupling Guidelines Voltage Identification VID SetVID Fast Command Svid CommandsSetVID Slow Command SetVID-Decay Command VR Power-State Transitions Svid Power State Functions SetPS Svid Address Usage Svid Voltage Rail AddressingPWM Address HEX Processor 159 Reserved or Unused Signals Signal Group SummarySignal Description Buffer Types Sheet 1 Signal Description Signal Groups Sheet 1 Signal Description Buffer Types Sheet 2 Signal Groups Sheet 2 Serial VID Interface Svid Signals Signal Groups Sheet 3Processor Asynchronous Sideband Signals Miscellaneous Signals Signals with On-Die Termination Power-On Configuration POC OptionsPower-On Configuration Option Lands Signal Name Pull Up /Pull Rail Value Units Down Fault Resilient Booting Output Tri-State Signals Fault Resilient Booting FRBOutput Tri-State Signal Groups Signals Mixing Processors Flexible Motherboard Guidelines FMB Symbol Parameter Min Max UnitAbsolute Maximum and Minimum Ratings Processor Absolute Minimum and Maximum Ratings 10. Storage Condition Ratings Storage Conditions Specifications DC Specifications 11. Voltage Specification Voltage and Current SpecificationsSymbol Parameter Voltage Min Typ Max Unit Plane VCC VID Parameter Symbol Processor TDP / Core Count 12. Processor Current SpecificationsMax a Definition Core/6-core CC a 13 /6 Core Processor VCC Static and Transient Tolerance ICC a VID 3,4,5,6 100 105 110 115 120 125 130 135 140 145 150 174 15. VCC Overshoot Specifications Sheet 1 VCC Overshoot SpecificationsSymbol Parameter Min Max Units Die Voltage Validation 16. DDR3 and DDR3L Signal DC Specifications Sheet 1 Signal DC Specifications15. VCC Overshoot Specifications Sheet 2 Reference Clock Signal 16. DDR3 and DDR3L Signal DC Specifications Sheet 2Command Signals Control Signals 18. System Reference Clock BCLK0/1 DC Specifications 17. Peci DC Specifications19. SMBus DC Specifications Sheet 1 Symbol Definition and Conditions Min Max Units 20. Jtag and TAP Signals DC Specifications 19. SMBus DC Specifications Sheet 221. Serial VID Interface Svid DC Specifications Sheet 1 Symbol Parameter Min Typ Max Units 22. Processor Asynchronous Sideband DC Specifications 21. Serial VID Interface Svid DC Specifications Sheet 2CMOS1.05v Signals Open Drain Cmos Odcmos Signals 3.2 DMI2/PCI Express* DC Specifications PCI Express* DC SpecificationsIntel QuickPath Interconnect DC Specifications Reset and Miscellaneous Signal DC Specifications VRB-Differential StableVcross MAX = 550mV Vcross MIN = 250mV 2 I/O Signal Quality Specifications Signal Quality1 DDR3 Signal Quality Specifications Input Reference Clock Signal Quality Specifications Intel QuickPath Interconnect Signal Quality Specifications24. Processor I/O Overshoot/Undershoot Specifications Overshoot/Undershoot Tolerance Activity Factor Reading Overshoot/Undershoot Specification TablesOvershoot/Undershoot Pulse Duration 11. Maximum Acceptable Overshoot/Undershoot Waveform Land Name Sheet 1 Listing by Land NameLand Name Sheet 2 Land Name Land No Buffer Type Direction Land Name Sheet 4 Land Name Sheet 3 Land Name Sheet 6 Land Name Sheet 5 Land Name Sheet 8 Land Name Sheet 7 Land Name Sheet 10 Land Name Sheet 9 Land Name Sheet 12 Land Name Sheet 11 Land Name Sheet 14 Land Name Sheet 13 Land Name Sheet 16 Land Name Sheet 15 Land Name Sheet 18 Land Name Sheet 17 Land Name Sheet 20 Land Name Sheet 19 Land Name Sheet 22 Land Name Sheet 21 Land Name Sheet 24 Land Name Sheet 23 Land Name Sheet 26 Land Name Sheet 25 Land Name Sheet 28 Land Name Sheet 27 Land Name Sheet 30 Land Name Sheet 29 Land Name Sheet 32 Land Name Sheet 31 Land Name Sheet 34 Land Name Sheet 33VCCD01 VCCD23 Land Name Sheet 36 Land Name Sheet 35 Land Name Sheet 38 Land Name Sheet 37 Land Name Sheet 40 Land Name Sheet 39 Land Name Sheet 42 Land Name Sheet 41 Land Name Sheet 44 Land Name Sheet 43 Land Name Sheet 46 Land Name Sheet 45 Land Name Sheet 48 Land Name Sheet 47Vtta Vttd Land Name Sheet 49 Land Number Sheet 1 Listing by Land NumberLand Number Sheet 2 Land No Land Name Buffer Type Direction Land Number Sheet 4 Land Number Sheet 3 Land Number Sheet 6 Land Number Sheet 5 Land Number Sheet 8 Land Number Sheet 7 Land Number Sheet 10 Land Number Sheet 9 Land Number Sheet 12 Land Number Sheet 11 Land Number Sheet 14 Land Number Sheet 13 Land Number Sheet 16 Land Number Sheet 15 Land Number Sheet 18 Land Number Sheet 17 Land Number Sheet 20 Land Number Sheet 19 Land Number Sheet 22 Land Number Sheet 21 Land Number Sheet 24 Land Number Sheet 23 Land Number Sheet 26 Land Number Sheet 25 Land Number Sheet 28 Land Number Sheet 27 Land Number Sheet 30 Land Number Sheet 29 Land Number Sheet 32 Land Number Sheet 31 Land Number Sheet 34 Land Number Sheet 33 Land Number Sheet 36 Land Number Sheet 35 Land Number Sheet 38 Land Number Sheet 37 Land Number Sheet 40 Land Number Sheet 39 Land Number Sheet 42 Land Number Sheet 41 Land Number Sheet 44 Land Number Sheet 43 Land Number Sheet 46 Land Number Sheet 45 Land Number Sheet 48 Land Number Sheet 47 236 Package Mechanical Drawing Processor Package Assembly Sketch 238 Processor Package Drawing Sheet 1 Processor Package Drawing Sheet 2 Package Insertion Specifications Package Loading SpecificationsProcessor Component Keep-Out Zones Package Handling Guidelines Processor Materials Processor Mass SpecificationProcessor Markings Processor Materials Available Boxed Thermal Solution Configurations Boxed Processor Specifications 244 STS200P and STS200PNRW 25.5 mm Tall Passive Heat Sinks Mechanical Specifications 246 Motherboard Keepout Zones 1 Motherboard Keepout Zones 2 Boxed Processor Specifications 248 Boxed Processor Motherboard Keepout Zones 3 TOP Surface of Motherboard Motherboard Keepout Zones 4 250 Boxed Processor Heat Sink Volumetric 1 Specifications Heat Sink Volumetric 2Processor Boxed Processor 10.4-Pin Fan Cable Connector For Active Heat Sink 11 -Pin Base Baseboard Fan Header For Active Heat Sink 21,000 25,000 28,000 Fan Power Supply STS200C Boxed Processor Cooling Requirements Boxed Processor Contents Boxed Processor 258