Intel E5-4600, E5-2600 manual Thermtripn Signal, Integrated Memory Controller IMC Thermal Features

PROCHOT_N can allow voltage regulator (VR) thermal designs to target maximum sustained current instead of maximum current. Systems should still provide proper cooling for the VR, and rely on PROCHOT_N as a backup in case of system cooling failure. The system thermal design should allow the power delivery circuitry to operate within its temperature specification even while the processor is operating at its Thermal Design Power.

With a properly designed and characterized thermal solution, it is anticipated that PROCHOT_N will be asserted for very short periods of time when running the most power intensive applications. An under-designed thermal solution that is not able to prevent excessive assertion of PROCHOT_N in the anticipated ambient environment may cause a noticeable performance loss. Refer to the appropriate platform design guide and for details on implementing the bi-directional PROCHOT_N feature.

5.2.5THERMTRIP_N Signal

Regardless of whether Adaptive Thermal Monitor is enabled, in the event of a catastrophic cooling failure, the processor will automatically shut down when the silicon has reached an elevated temperature (refer to the THERMTRIP_N definition in Section 6, “Signal Descriptions”). At this point, the THERMTRIP_N signal will go active and stay active. THERMTRIP_N activation is independent of processor activity and does not generate any Intel QuickPath Interconnect transactions. If THERMTRIP_N is asserted, all processor supplies (VCC, VTTA, VTTD, VSA, VCCPLL, VCCD) must be removed within the timeframe provided. The temperature at which THERMTRIP_N asserts is not user configurable and is not software visible.

5.2.6Integrated Memory Controller (IMC) Thermal Features

5.2.6.1DRAM Throttling Options

The Integrated Memory Controller (IMC) has two, independent mechanisms that cause system memory throttling:

•Open Loop Thermal Throttling (OLTT) and Hybrid OLTT (OLTT_Hybrid)

•Closed Loop Thermal Throttling (CLTT) and Hybrid CLTT (CLTT_Hybrid)

5.2.6.1.1Open Loop Thermal Throttling (OLTT)

Pure energy based estimation for systems with no BMC or Intel ME. No memory temperature information is provided by the platform or DIMMs. The CPU is informed of the ambient temperature estimate by the BIOS or by a device via the PECI interface. DIMM temperature estimates and bandwidth control are monitored and managed by the PCU on a per rank basis.

5.2.6.1.2Hybrid Open Loop Thermal Throttling (OLTT_Hybrid)

Temperature information is provided by the platform (for example, BMC or Intel® Management Engine (Intel® ME)) through PECI and the PCU interpolates gaps with energy based estimations.

5.2.6.1.3Closed Loop Thermal Throttling (CLTT)

The processor periodically samples temperatures from the DIMM TSoD devices over a programmable interval. The PCU determines the hottest DIMM rank from TSoD data and informs the integrated memory controller for use in bandwidth throttling decisions.

Intel® Xeon® Processor E5-1600/E5-2600/E5-4600 Product Families	141
Datasheet Volume One