Intel E5-1600 Signal Groups Sheet 3, Serial VID Interface Svid Signals, Miscellaneous Signals

Electrical Specifications

Table 7-5. Signal Groups (Sheet 3 of 3)

Differential/Single	Buffer Type	Signals1
Ended
JTAG & TAP Signals
Single ended	CMOS1.05V Input	TCK, TDI, TMS, TRST_N
	CMOS1.05V Input/Output	PREQ_N
	CMOS1.05V Output	PRDY_N
	Open Drain CMOS Input/	BPM_N[7:0]
	Output	EAR_N
	Open Drain CMOS Output	TDO
Serial VID Interface (SVID) Signals
Single ended	CMOS1.05v Input	SVIDALERT_N
	Open Drain CMOS Input/	SVIDDATA
	Output
	Open Drain CMOS Output	SVIDCLK
Processor Asynchronous Sideband Signals
Single ended	CMOS1.05v Input	BIST_ENABLE
		BMCINIT
		FRMAGENT
		PWRGOOD
		PMSYNC
		RESET_N
		SAFE_MODE_BOOT
		SOCKET_ID[1:0]
		TXT_AGENT
		TXT_PLTEN
	Open Drain CMOS Input/	CAT_ERR_N
	Output	CPU_ONLY_RESET
		MEM_HOT_C{01/23}_N
		PROCHOT_N
	Open Drain CMOS Output	ERROR_N[2:0]
		THERMTRIP_N
Miscellaneous Signals
N/A	Output	IVT_ID_N
		SKTOCC_N
Power/Other Signals
	Power / Ground	VCC, VTTA, VTTD, VCCD_01, VCCD_23,VCCPLL, VSA and VSS
	Sense Points	VCC_SENSE
		VSS_VCC_SENSE
		VSS_VTTD_SENSE
		VTTD_SENSE
		VSA_SENSE
		VSS_VSA_SENSE
Notes:

1.Refer to Section 6, “Signal Descriptions” for signal description details.

2.DDR{0/1/2/3} refers to DDR3 Channel 0, DDR3 Channel 1, DDR3 Channel 2 and DDR3 Channel 3.

Intel® Xeon® Processor E5-1600/E5-2600/E5-4600 Product Families	163
Datasheet Volume One