Power Management

Table 4-9. Coordination of Core Power States at the Package Level

Package C-State

 

 

Core 1

 

 

 

 

 

 

C0

C1

 

C3

C6

 

 

 

 

 

 

 

 

 

 

 

C0

C0

C0

 

C0

C0

 

 

 

 

 

 

 

0

C1

C0

C11

 

C11

C11

Core

 

 

 

 

 

 

C3

C0

C11

 

C3

C3

 

 

 

 

 

 

 

 

C6

C0

C11

 

C3

C6

 

 

 

 

 

 

 

Notes:

1. The package C-state will be C1E if all actives cores have resolved a core C1 state or higher.

Figure 4-3. Package C-State Entry and Exit

C0C1

C2

C3C6

4.2.5.1Package C0

The normal operating state for the processor. The processor remains in the normal state when at least one of its cores is in the C0 or C1 state or when the platform has not granted permission to the processor to go into a low power state. Individual cores may be in lower power idle states while the package is in C0.

4.2.5.2Package C1/C1E

No additional power reduction actions are taken in the package C1 state. However, if the C1E substate is enabled, the processor automatically transitions to the lowest supported core clock frequency, followed by a reduction in voltage. Autonomous power reduction actions which are based on idle timers, can trigger depending on the activity in the system.

The package enters the C1 low power state when:

Intel® Xeon® Processor E5-1600/E5-2600/E5-4600 Product Families

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Datasheet Volume One

 

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Intel E5-1600 Package C0, Package C1/C1E, Coordination of Core Power States at the Package Level, Package C-State Core