Intel E5-2600, E5-4600 DMI2/PCI Express* Port 0 Signals, Intel QuickPath Interconnect Signals

Signal Descriptions

Table 6-6. PCI Express* Miscellaneous Signals (Sheet 2 of 2)

Signal Name

Description

PEHPSDA

PCI Express* Hot-Plug SMBus Data: Provides PCI Express* hot- plug support via a dedicated SMBus interface. Requires an external general purpose input/output (GPIO) expansion device on the platform.

Note: Refer to the appropriate Platform Design Guide (PDG) for additional implementation details.

6.3DMI2/PCI Express* Port 0 Signals

Table 6-7. DMI2 and PCI Express* Port 0 Signals

Signal Name

Description

DMI_RX_DN[3:0]	DMI2 Receive Data Input
DMI_RX_DP[3:0]
DMI_TX_DP[3:0]	DMI2 Transmit Data Output
DMI_TX_DN[3:0]

6.4Intel QuickPath Interconnect Signals

Table 6-8. Intel QPI Port 0 and 1 Signals

Signal Name

QPI{0/1}_CLKRX_DN/DP

QPI{0/1}_CLKTX_DN/DP

QPI{0/1}_DRX_DN/DP[19:00]

QPI{0/1}_DTX_DN/DP[19:00]

Description

Reference Clock Differential Input. These pins provide the PLL reference clock differential input. The Intel QPI forward clock frequency is half the Intel QPI data rate.

Reference Clock Differential Output. These pins provide the PLL reference clock differential input. The Intel QPI forward clock frequency is half the Intel QPI data rate.

Intel QPI Receive data input.

Intel QPI Transmit data output.

Table 6-9. Intel QPI Miscellaneous Signals

Signal Name

Description

QPI_RBIAS	This input is used to control Intel QPI bias currents. QPI_RBIAS is
	required to be connected as if the link is being used even when
	Intel QPI is not used. Refer to the appropriate Platform Design
	Guide (PDG) for further details.
QPI_RBIAS_SENSE	Provides dedicated bias resistor sensing to minimize the voltage
	drop caused by packaging and platform effects.
	QPI_RBIAS_SENSE is required to be connected as if the link is
	being used even when Intel QPI is not used. Refer to the
	appropriate Platform Design Guide (PDG) for further details.
QPI_VREF_CAP	Intel QPI voltage reference used to measure the actual output
	voltage and comparing it to the assumed voltage. Refer to the
	appropriate Platform Design Guide (PDG) for further details.

Note: Refer to the appropriate Platform Design Guide (PDG) for additional implementation details.

146	Intel® Xeon® Processor E5-1600/E5-2600/E5-4600 Product Families
	Datasheet Volume One