Panasonic F77G, MN101C77C „ATC1 Control Register 1 AT1CNT1, „ATC1 Transfer Counter AT1TRC

Models: F77G MN101C77C

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Chapter 14 Automatic Transfer Controller

„ATC1 Control Register 1 (AT1CNT1)

 

7

6

5

4

3

2

1

0

 

 

AT1CNT1

 

 

 

 

 

 

 

 

 

 

-

-

-

BTSTP

AT1IR3

AT1IR2

AT1IR1

AT1IR0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(At reset : -

- - x x x x x )

AT1IR3

 

AT1IR2

 

AT1IR1

 

AT1IR0

 

ATC1 trigger

 

 

 

 

 

 

 

 

factor settings

 

 

 

 

0

 

0

 

External interrupt 0

 

 

 

 

 

 

 

 

 

 

0

 

 

1

 

External interrupt 1

 

 

 

 

 

 

 

 

 

1

 

0

 

Serial interface 0 interrupt

 

 

 

 

 

 

0

 

 

 

 

1

 

Serial interface 1 interrupt

 

 

 

 

 

 

 

 

 

0

 

0

 

Timer 7 interrupt

 

 

 

 

 

 

 

 

1

 

 

1

 

Timer 7 capture trigger

 

 

 

 

 

 

 

 

 

1

 

0

 

A/D interrupt

 

 

 

 

 

 

 

 

 

 

 

1

 

Software initialization

 

 

 

 

 

 

 

 

 

 

 

0

 

0

 

External interrupt 2

 

 

0

 

 

1

 

External interrupt 3

 

 

 

 

 

 

 

 

 

1

 

0

 

(Disable)

 

 

 

 

 

 

1

 

 

 

 

1

 

Serial interface 3 interrupt

 

 

 

 

 

 

 

 

 

0

 

0

 

Reserved

 

 

 

 

 

 

 

 

1

 

 

1

 

Reserved

 

 

 

 

 

 

 

 

 

1

 

0

 

Serial interface 4 interrupt

 

 

 

 

 

 

 

 

 

 

 

1

 

Timer 1 interrupt

 

 

 

 

 

 

 

BTSTP Burst transfer stop enable

0Burst transfer stop disable Burst transfer stop enable

1(Transfer stops when external interrupt 0 occurs.)

Figure 14-2-2 ATC1 Control Register 1 (AT1CNT1 : x'03FD1', R/W)

„ATC1 Transfer Counter (AT1TRC)

AT1TRC

7

6

5

4

3

2

1

0

AT1TRC7 AT1TRC6 AT1TRC5 AT1TRC4 AT1TRC3 AT1TRC2 AT1TRC1 AT1TRC0

(At reset : x x x x x x x x)

AT1TRC7 to 0 ATC1 Transfer Data Count Setting

·For transfer modes 0 to D, set this register to the number of ATC activations. The register decrements by 1 after every ATC1 activation. When the count reaches x'00', an ATC1 interrupt occurs and the transfer ends.

·For transfer modes E and F, set this register to number of burst transfers. The register decrements by 1 every time one byte

is transfered. When the count reaches x'00', an ATC1 interrupt occurs and the transfer ends.

Figure 14-2-3 ATC1 Transfer Data Counter (AT1TRC : x'03FD2', R/W)

Control Registers

XIV - 7

Page 445
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Panasonic F77G, MN101C77C user manual „ATC1 Control Register 1 AT1CNT1, „ATC1 Transfer Counter AT1TRC