Panasonic MN101C77C, F77G user manual Input Pins of A/D Converter Setup

Chapter 15 A/D Converter

15-3-1 Setup

„Input Pins of A/D Converter Setup

Input pins for A/D converter is selected by the ANCH2 to 0 flag of the ANCTR1 register.

Table 15-3-1 Input Pins of A/D Converter Setup

ANCHS2	ANCHS1	ANCHS0	A/D pin
	0	0	AN0 pin
0		1	AN1 pin
	1	0	AN2 pin
		1	AN3 pin
	0	0	AN4 pin
1		1	AN5 pin
	1	0	AN6 pin
		1	Reserved

„Clock of A/D Converter Setup

The A/D converter clock is set by the ANCK1 to 0 flag of the ANCTR0 register. Set the A/D converter clock (TAD) more than 800 ns and less than 15.26 ∝s. Table 15-3-2 shows the machine clock (fosc, fx, fs) and the A/D converter clock (TAD). (calculated as fs = fosc/2, fx/4)

Table 15-3-2 A/D Conversion Clock and A/D Conversion Cycle

		A/D		A/D conversion cycle (TAD)
ANCK1	ANCK0	conversion	at oscillation for high speed		at oscillation for low speed
		clock
			at fosc=20 MHz	at fosc=8.38 MHz	at fx=32.768 kHz
	0	fs/2	200.00 ns	477.33 ns	244.14 ∝s
			(no usable)	(no usable )	(no usable )
0
	1	fs/4	400.00 ns	954.65 ns	488.28 ∝s
			(no usable)		(no usable )
	0	fs/8	800.00 ns	1.91 ∝s	976.56 ∝s
1					(no usable )
	1	fx x 2	15.26 ∝s	15.26 ∝s	15.26 ∝s

For the system clock (fs), refer to Chapter 2. 2-5 Clock Switching.

„Sampling Time (Ts) of A/D Converter Setup

The sampling time of A/D converter is set by the ANSH1 to 0 flag of the ANCTR0 register. The sampling time of A/D converter depends on external circuit, so set the right value by analog input impedance.

Table 15-3-3 Sampling Time of A/D Conversion and A/D Conversion Time

ANSH1	ANSH0	Sampling time		A/D conversion time
		(Ts)	at TAD=800 ns	at TAD=954.65 ns	at TAD=1.91 ∝s	at TAD=15.26 ∝s
0	0	TAD x 2	9.60 ∝s	11.46 ∝s	22.92 ∝s	183.12 ∝s
	1	TAD x 6	12.80 ∝s	15.27 ∝s	30.56 ∝s	244.16 ∝s
1	0	TAD x 18	22.40 ∝s	26.73 ∝s	53.48 ∝s	427.28 ∝s
	1	Reserved	-	-	-	-

XV - 10 Operation