Panasonic F77G, MN101C77C user manual Programmable active Edge Interrupt

Chapter 7 16-bit Timer

with the automatic data transfer function (ATC1). In the transfer mode 5 of ATC1, set the address of the input capture register TM7ICL to the memory pointer 1. The "H" period and "L" period of the input signal can be measured by transferring the value of the input capture register (TM7ICL, TM7ICH) to memory in every generation of a capture trigger.

An interrupt request and a capture trigger are generated at switching the valid edge of an external interrupt by program, when the setup is as follows ;

(1)at switching the valid edge from the falling to the rising, when the interrupt pin is "H" level.

(2)at switching the valid edge from the rising to the falling, when the interrupt pin is "L" level. This is not happened, if the interrupt edge is switched after the generation of an valid edge interrupt set in advance. But when the both edges interrupt function is used, this may be happened. Be sure to consider the noise influence for operation of the interrupt flag on program.

[ Chapter 3 3-3-4. Programmable active Edge Interrupt ]

„Capture Count Timing at a Both Edges of External Interrupt Signal is selected as a Trigger (Timer 7)

Count clock

TM7EN flag

Compare

register

N

Binary	N	0000 0001	0111 0112	0113 0114	5555 5556 5557 5558	N-1 N
counter
External
interrupt m
Capture
trigger
Capture		0000	0111	0114	5555	5558
register

Figure 7-9-1 Capture Count Timing at an External Interrupt Signal is selected as a Trigger

(Timer 7)

A capture trigger is generated at the both edges of the external interrupt m input signal. At the same timing, the value of a binary counter is stored to the input capture register. That value is decided by the value of a binary counter at the falling edge of a capture trigger. When the specified edge is selected as a capture trigger generation source, a capture trigger is generated at the interrupt generation specified edge, only. The other count timing is same to the count timing of the timer operation.

When the binary counter is used as a free counter that counts x'0000' to x'FFFF', set the compare register 1 to x'FFFF', or set the TM7BCR flag of the TM7MD2 register to "0".

Even if a capture trigger is generated before the value of the input capture register is read out, the value of the input capture register can be rewritten.

16-bit Timer Capture VII - 35