Panasonic MN101C77C, F77G user manual Reception Timing Rising edge, Enable Start Condition

Chapter 12 Serial Interface 3

„Reception Timing

at master

Tmax=2.5 T T

Clock (SBT3 pin)

Input data (SBI3 pin)

Transfer bit counter 0 1 2 3 4 5 6 7

SC3BSY

(Write data to SC3TRB) interrupt

(SC3IRQ)

Figure 12-3-6 Reception Timing (Rising edge, Enable Start Condition)

at master
Tmax=1.5 T	T

Clock (SBT3 pin)

Input data (SBI3 pin)

Transfer bit counter 0 1 2 3 4 5 6 7

SC3BSY

(Write data to SC3TRB) Interrupt

(SC3IRQ)

Figure 12-3-7 Reception Timing (Rising edge, Disable Start Condition)

XII - 16 Operation