Panasonic MN101C77C, F77G TM6ICR x3FEF Bp1, Set the TM6IE flag of the TM6ICR register to

Models: F77G MN101C77C

1 544
Download 544 pages 59.61 Kb
Page 308
Image 308

Chapter 8 Time Base Timer / 8-bit Free-running Timer

8-3-2 Setup Example

„Timer Operation Setup (Timer 6)

Timer 6 generates an interrupt constantly for timer function. Fs(fosc = 20 MHz) is selected as a clock source to generate an interrupt every 250 cycles (25 µs).

An example setup procedure, with a description of each step is shown below.

 

Setup Procedure

 

 

 

Description

 

 

 

 

 

(1)

Enable the binary counter

 

(1)

Set the TM6LRS flag of the timer 6 mode

 

initialization.

 

 

 

register (TM6MD) to "0". At that time, the

 

TM6MD (x'3F6A')

 

 

initialization of the timer 6 binary counter

 

bp7

: TM6CLRS = 0

 

(TM6BC) is enabled.

(2)

Select the clock source.

 

(2)

Clock source can be selected by the TM6CK3-1

 

TM6MD (x'3F6A')

 

 

flag of the TM6MD register. Actually, fs is

 

bp3-1

: TM6CK3-1 = 001

 

selected.

(3)

Set the interrupt generation cycle.

(3)

Set the interrupt generation cycle to the timer

 

TM6OC (X'3F69')

= x'F9'

 

6 compare register (TM6OC). At that timer,

 

 

 

 

 

TM6BC is initialized to x'00'.

(4)

Enable the interrupt request

(4)

Set the TM6CLRS flag of the TM6MD register to

 

generation.

 

 

 

"1" to enable the interrupt request generation.

 

TM6MD (x'3F6A')

 

 

 

 

 

bp7

: TM6CLRS = 1

 

 

 

(5)

Set the interrupt level.

 

(5)

Set the interrupt level by the TM6LV1-0 flag of

 

TM6ICR (x'3FEF')

 

 

the timer 6 interrupt control register (TM6ICR).

 

bp7-6

: TM6LV1-0 = 01

 

If the interrupt request flag may be already set,

 

 

 

 

 

clear them.

(6)

Enable the interrupt.

 

 

[

Chapter 3 3-1-4. Interrupt Flag Setup ]

 

TM6ICR (x'3FEF')

 

 

 

 

 

bp1

: TM6IE

= 1

(6)

Set the TM6IE flag of the TM6ICR register to "1"

 

 

 

 

 

to enable the interrupt.

 

 

 

 

 

 

 

* the above steps (1), (2) can be set at once.

As TM6OC is set, TM6BC is initialized to x'00' to count up.

When TM6BC matches TM6OC, the timer 6 interrupt request flag is set to "1" at the next count clock and TM6BC is cleared to x'00' to restart counting.

VIII - 10 8-bit Free-running Timer

Page 308
Image 308
Panasonic MN101C77C, F77G user manual TM6ICR x3FEF Bp1, Set the TM6IE flag of the TM6ICR register to