Panasonic MN101C77C, F77G user manual Transfer Mode

Models: F77G MN101C77C

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Chapter 14 Automatic Transfer Controller

14-3-13 Transfer Mode 8

In transfer mode 8, ATC1 automatically transfers one byte of data two times every time an ATC1 activation request occurs.

(2)

(4)

Memory Pointer 0 00000 - 3FFFF

AT1MAP0

AT1MAP0 + 1

AT1MAP0 + 2

AT1MAP0 + 3

Memory Pointer 1 03F00 - 03FFF

(1)AT1MAP1 (even)

(2)

(3) AT1MAP1 (odd)

(Only lower

8 bits are valid)

Figure 14-3-10 Transfer Mode 8

In this mode the transfer direction indicated by memory pointers 0 and 1 reverses for the second data byte transfer.

In the first data byte transfer, the I/O space address (x'03F00' - x'03FFF') in memory pointer 1 is the source address, and the address in memory pointer 0, for any memory space, is the destination address. When the first data byte transfer ends, the address in memory pointer 0 increments by one.

In the second data byte transfer, the incremented address in memory pointer 0 becomes the source address, and the I/O space address (x'03F00' - x'03FFF') in memory pointer 1 becomes the destination address. When the second data byte transfer ends, the address in memory pointer 0 increments again.

Set an even I/O address in the lower 8 bits of memory pointer 1 (AT1MAP1L). The upper 10 bits of the I/O space address (x'03F') need not to be set in AT1MAP1H, AT1MAP1M.

Always set an even I/O address in memory pointer 1. In this double transfer of a data byte from and to the I/O space, ATC1 targets the even I/O address set in memory pointer 1 and the odd address that immediately follows it. In this mode, the first data byte transfer ac- cesses an even I/O address and the second data byte transfer accesses an odd I/O ad- dress.

XIV - 24 Operation

Page 462
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Panasonic MN101C77C, F77G user manual Transfer Mode