Panasonic MN101C77C, F77G user manual External Interrupt 1 Control Register IRQ1ICR x03FE3, R/W

Chapter 3 Interrupts

■External Interrupt 1 Control Register (IRQ1ICR)

The external interrupt 1 control register (IRQ1ICR) controls interrupt level of external interrupt 1, active edge, interrupt enable and interrupt request. Interrupt control register should be operated when the maskable interrupt enable flag (MIE) of PSW is "0".

IRQ1ICR

7	6	5
IRQ1	IRQ1	REDG1
LV1	LV0

4 3 2 1 0

- - - IRQ1IE IRQ1IR

(At reset : 0 0 0 - - - 0 0 )

IRQ1IR

External interrupt request flag

0No interrupt request

1Interrupt request generated

IRQ1IE

External interrupt enable flag

0Disable interrupt

1Enable interrupt

REDG1

External interrupt active edge flag

0Falling edge

1Rising edge

IRQ1

LV1

IRQ1

LV0

Interrupt level flag for external interrupt

The CpU has interrupt levels from 0 to 3. These flag set the interrupt level for interrupt requests.

Figure 3-2-3 External Interrupt 1 Control Register (IRQ1ICR : x'03FE3', R/W)

III- 18 Control Registers