Panasonic MN101C77C, F77G user manual RC0VL, RC0VH, RC0VL = xB4 RC0VH =, 06BB FF

Models: F77G MN101C77C

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Chapter 2 CPU Basics

„ROM Correction Setup Example

The setup procedure with ROM correction to correct 2 parts of the program is shown below.

For the step to execute the ROM correction, refer to figure 2-7-12. Initial Routine for ROM correction on the previous page.

(STEP 1) Develop the correct program of the external EEPROM to RAM area.

Internal RAM

Address Data

06B4 0A

06B5 00

06B6 85

06B7 93

06B8 C2

06B9 91

06BA F0

06BB FF

06BC 0A

06BD 14

06BE 85

06BF 93

06C0 02

06C1 90

06C2 00

 

 

 

 

 

 

 

 

External EEPROM

 

 

 

 

 

 

 

 

 

 

 

Address

Data

 

 

 

 

0000

 

 

03

 

Program management version.

 

 

0001

 

 

19

 

 

 

 

0002

 

 

09

 

Set value to the ROM correction address 0 setting register

 

 

0003

 

 

01

 

(RC0AP)

 

 

0004

 

 

B4

 

The head address of the development first correct program

 

 

0005

 

 

06

 

 

 

 

 

 

 

 

 

0006

 

 

 

 

 

 

 

 

 

 

FD

 

 

 

 

0007

 

 

08

 

Set value to the ROM correction address 1 setting register

 

 

0008

 

 

01

 

(RC1AP)

 

 

0009

 

 

BC

 

The head address of the development second correct program

 

 

000A

06

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

000B

 

0A

 

 

 

 

000C

 

00

 

 

 

 

000D

 

85

 

 

 

 

000E

 

93

 

The first correct program instruction code

 

 

000F

 

C2

 

 

develop

0010

 

 

91

 

 

 

 

 

 

 

 

 

0011

 

 

F0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0012

 

 

FF

 

For half-byte instruction adjustment

 

 

0013

 

 

0A

 

(no need to the real ROM)

 

 

0014

 

 

14

 

 

 

 

0015

 

 

85

 

The second correct program instruction code

 

 

0016

 

 

93

 

 

 

 

 

 

 

 

 

0017

 

 

02

 

 

 

 

0018

 

 

90

 

 

 

 

0019

 

 

 

 

 

 

 

 

 

 

00

 

 

 

 

 

 

 

 

 

 

 

(STEP 2) Set the ROM correction address setting register and the RC vector table.

[Setup for the first correction]

Set the head address of the program to be corrected at first to the ROM correction address 0 setting register (RC0AP).

RC0APL = x'19' RC0APM = x'09' RC0APH = x'01'

Set the internal RAM address x'06B4' that stored the first correct program to the RC vector table address

The first program to be corrected (internal ROM)

 

The head address of the correction

Address

 

Data

(the set value of RC0AP)

 

 

 

 

10916

 

D900A0

cbne

0, d1, 1091E

10919

 

A005

mov

50, d0

 

1091B

58

mov

d0, (a0)

1091C

8940

bra

10920

 

1091E

 

B4

sub

d0, d0

The address for recover

The first correct program (internal RAM)

The head address of the correction program

(RC0V(L), RC0V(H).

Address Data

(the set value of RC0V)

RC0V(L) = x'B4' RC0V(H) = x'06'

006B4

A000

mov

0, d0

 

006B6

58

mov

d0, (a0)

006B7

392C190

bra

1091C

The addres for recover

II- 36 ROM Correction

Page 88
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Panasonic MN101C77C, F77G user manual RC0VL, RC0VH, RC0VL = xB4 RC0VH =, 06BB FF