Panasonic MN101C77C, F77G user manual „Bank Register for Source Address, Sbnkr, Dbnkr

Chapter 2 CPU Basics

„Bank Register for Source Address

The SBNKR register is used to specify bank area for loading instruction from memory to register. Once this register is specified, bank control is valid for all addressing modes except I/O short instruction and stack relative indirect instruction.

[ Chapter 2 2-1-8. Addressing modes ]

SBNKR

7	6	5	4	3	2	1	0
-	-	-	-	-	-	SBA1	SBA0

( At reset : - - - - - - 0 0 )

SBA1	SBA0	Bank for source address selection
0	0	bank 0
0	1	bank 1
1	0	bank 2
1	1	bank 3

Figure 2-6-1 Bank Register for Source Address (SBNKR:x'03F0A', R/W)

„Bank Register for Destination Address

The DBNKR register is used to specify bank area for storing instruction from register to memory. Once this register is specified, bank control is valid for all addressing modes except I/O short instruction,stack relative indirect instruction and bit manipulation instruction.

[ Chapter 2 2-1-8. Addressing modes ]

DBNKR

7	6	5	4	3	2	1	0
-	-	-	-	-	-	DBA1	DBA0

( At reset : - - - - - - 0 0 )

DBA1	DBA0	Bank for destination address selection
0	0	bank0
0	1	bank1
1	0	bank2
1	1	bank3

Figure 2-6-2 Bank Register for Destination Address (DBNKR:x'03F0B', R/W)

Read, modify, write instruction such as bit manipulation (BSET, BCLR, BTST) depend on the value of the SBNKR register, both of for reading and writing.

II- 28 Bank Function