Panasonic F77G, MN101C77C user manual Addressing Modes, Psw

Models: F77G MN101C77C

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Chapter 2 CPU Basics

Table 2-1-4 Addressing Modes

Addressing mode

 

Dn/DWn

Register direct

An/SP

 

PSW

Immediate

imm4/imm8

imm16

 

Register indirect

(An)

Effective address

-

-

150

An

Explanation

Directly specifies the register. Only internal registers can be specified.

Directly specifies the operand or mask value appended to the instruction code.

Specifies the address using an address register.

(d8, An)

(d16, An)

Register relative

indirect

(d4, PC) (branch instructions only)

(d7, PC) (branch instructions only)

(d11, PC)

(branch instructions only)

(d12, PC)

(branch instructions only)

15

0

 

Specifies the address using an address

 

register with 8-bit displacement.

 

An+d8

 

 

 

 

 

 

15

0

 

Specifies the address using an address

 

register with 16-bit displacement.

 

An+d16

 

 

 

 

 

 

17

0 H

Specifies the address using the program

 

PC+d4

 

 

counter with 4-bit displacement and H bit.

 

 

 

 

* 1

17

0 H

Specifies the address using the program

counter with 7-bit displacement and H bit.

 

PC+d7

 

 

 

 

 

 

 

 

 

 

* 1

17

0 H

Specifies the address using the program

 

PC+d11

 

 

counter with 11-bit displacement and H bit.

 

 

 

 

 

 

 

* 1

17

0 H

Specifies the address using the program

 

PC+d12

 

 

counter with 12-bit displacement and H bit.

 

 

 

 

* 1

(d16, PC)

(branch instructions only)

(d4, SP)

Stack relative indirect

(d8, SP)

(d16, SP)

17

0 H

 

 

PC+d16

 

15

0

 

 

 

SP+d4

 

15

0

 

 

 

SP+d8

 

15

0

 

 

 

SP+d16

 

Specifies the address using the program counter with 16-bit displacement and H bit.

* 1

Specifies the address using the stack pointer with 4-bit displacement.

Specifies the address using the stack pointer with 8-bit displacement.

Specifies the address using the stack pointer with 16-bit displacement.

 

(abs8)

7

0

 

 

Absolute

 

 

 

 

abs8

 

 

 

 

 

 

 

 

 

 

(abs12)

11

 

0

 

Specifies the address using the operand

 

 

 

 

abs12

 

value appended to the instruction code.

 

 

 

 

 

 

 

 

15

 

 

0

 

Optimum operand length can be used to

 

(abs16)

 

 

 

specify the address.

 

 

 

abs16

 

 

 

 

 

 

 

 

 

(abs18)

17

 

 

0 H

 

 

(branch instructions only)

 

 

abs18

 

 

* 1

 

 

 

 

 

 

 

RAM short

(abs8)

7

0

 

Specifies an 8-bit offset from the address

 

 

 

 

abs8

 

x'00000'.

 

 

 

 

 

 

 

 

I/O short

15

0

(io8)

 

IOTOP+io8

Specifies an 8-bit offset from the top address (x'03F00') of the special function register area.

 

 

 

Reuses the last memory address accessed

 

(HA)

 

and is only available with the MOV and

Handy

-

MOVW instructions. Combined use with

 

 

 

absolute addressing reduces code size.

 

 

 

* 1 H: half-byte bit

Overview II - 11

Page 63
Image 63
Panasonic F77G, MN101C77C user manual Addressing Modes, Psw