Panasonic MN101C77C, F77G user manual Block Diagram P52

Chapter 4 I/O Ports

			Reset
					SC3ODC1
Nch open-drain control				R
				D Q
		Write
				L		Read
			Reset
Pull-up resistor control				R	P5PLU2
				D Q
		Write		L		Read
			Reset
I/O direction control				R	P5DIR2
				D Q
		Write		L		Read
	Data		Reset
	bus				P5OUT2		0	M
Port output data				R
				D Q				U
		Write		L		Read	1

X

P5IN2

Port input data

Read

Serial interface 3 clock input

Serial interface 3 clock output

SC3MD1 register

SC3SBTS flag

Figure 4-5-4 Block Diagram (P52)

			Reset
					SC4ODC10
Nch open-drain control				R
				D Q
		Write
				L		Read
			Reset
Pull-up resistor control				R	P5PLU3
				D Q
		Write		L		Read
			Reset
I/O direction control				R	P5DIR3
				D Q
		Write		L		Read
	Data		Reset
	bus				P5OUT3		0	M
Port output data				R
				D Q				U
		Write		L		Read	1

X

P5IN3

Port input data

Read

Serial interface 4 reception data input

Serial interface 4 transmission data output

SC4AD1 register

SELI2C flag

Figure 4-5-5 Block Diagram (P53)

P52

P53

IV - 24 Port 5