Panasonic MN101C77C, F77G user manual VI 32 Synchronous Output

Chapter 6 8-bit Timers

Setup Procedure			Description
(7) Set the synchronous output event			(7) Set the synchronous output generation cycle
generation cycle.			to the timer 1 compare register (TM1OC).
TM1OC(x'3F53')		= x'63'	The setting value is set to 100-1=99(x'63'),
			because 1 MHz is divided by 10 kHz.
			At that time, the timer 1 binary counter
			(TM1BC) is initialized to x'00'.
(8) Start the timer operation.			(8) Set the TM1EN flag of the TM1MD register to
TM1MD(x'3F55')			"1" to start timer 1.
bp3	:TM1EN	= 1

TM1BC counts up from x'00'. If any data is written to the port 6 output register (P6OUT), the data of port 6 is output from the synchronous output pin in every time an interrupt request is generated by the match of TM1BC and the set value of the TM1OC register.

VI - 32 Synchronous Output