2.4 System board Troubleshooting | 2 Troubleshooting | |||
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| D port | Inspection items | details |
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| status |
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| F000h | Start | Clearing a software reset bit |
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| Enabling address line A20 |
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| Initializing special registers and Intel chipset |
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| Initializing the CH0 of a PIT |
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| Initializing flags determining whether BIOS is rewritten |
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| CHECK SUM CHECK | CHECK SUM CHECK |
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| Switching to protected mode |
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| Examining the checksum of Boot Block |
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| Examining the checksum of other data in a flash memory |
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| F001h | Initializing a KBC (1) | Checking if EC/KBC firmware is to be rewritten |
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| Initializing a KBC |
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| Sending command bytes |
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| Sending scan enable command |
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| Checking F12 | Checking F12 |
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| F002h |
| Initializing a security controller |
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| F005h | Checking whether BIOS | Checking whether BIOS rewrite is requested |
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| rewrite is requested |
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| F006H | Checking BIOS signature | Checking BIOS signature |
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| F007h | Rewriting BIOS | Initializing HW |
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| Initializing GPIO I/O space |
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| Enabling BIOS writing |
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| Serial interrupt control |
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| Disabling BIOS write protection |
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| Enabling SMBus I/O space |
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| Enabling SMBus access |
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| Configuring DRAM |
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| Enabling L1 cache memory |
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| Clearing memory |
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| Disabling cache |
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| Initializing special registers |
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| F008h |
| Changing ROM BIOS to RAM BIOS |
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| F009h |
| Storing key scan code |
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| Setting up TASK_1ms_TSC |
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| Displaying message on navipanel (EC/KBC UPDATE, |
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| BIOS UPDATA/DAMAGED) |
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PORTEGE R100 Maintenance Manual |
